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參數(shù)資料
| 型號： | MB90F352PFV |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | PLASTIC, LQFP-64 |
| 文件頁數(shù)： | 2/64頁 |
| 文件大?。?/td> | 800K |
| 代理商： | MB90F352PFV |
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MB90350 Series
10
(Continued)
Pin No.
Pin name
Circuit
type
Function
LQFP64*
39
P17
G
General purpose I/O port. The register can be set to select whether to use
a pull-up resistor. This function is enabled in single-chip mode.
AD15
Input/output pin for external bus address data bus bit 15.
This function is enabled when external bus is enabled.
40 to 43
P20 to P23
G
General purpose I/O ports. The register can be set to select whether to use
a pull-up resistor. In external bus mode, the pin is enabled as a general-
purpose I/O port when the corresponding bit in the external address output
control register (HACR) is 1.
A16 to A19
Output pins for A16 to A19 of the external address bus.
When the corresponding bit in the external address output control register
(HACR) is 0, the pins are enabled as high address output pins A16 to A19.
PPG9, PPGB,
PPGD, PPGF
Output pins for PPGs.
44
P24
G
General purpose I/O port. The register can be set to select whether to use
a pull-up resistor. In external bus mode, the pin is enabled as a general-
purpose I/O port when the corresponding bit in the external address output
control register (HACR) is 1.
A20
Output pins for A20 of the external address bus. When the corresponding
bit in the external address output control register (HACR) is 0, the pin is
enabled as high address output pins A20.
IN0
Data sample input pin for input capture ICU0.
51
P25
G
General purpose I/O port. The register can be set to select whether to use
a pull-up resistor. In external bus mode, the pin is enabled as a general-
purpose I/O port when the corresponding bit in the external address output
control register (HACR) is 1.
A21
Output pin for A21 of the external address bus. When the corresponding bit
in the external address output control register (HACR) is 0, the pin is en-
abled as high address output pin A21.
IN1
Data sample input pin for input capture ICU1.
ADTG
Trigger input pin for A/D converter.
52
P44
H
General purpose I/O port
SDA0
Serial data I/O pin for I2C 0 (devices with C-suffix)
FRCK0
Input pin for the 16-bit I/O Timer 0
53
P45
H
General purpose I/O port.
SCL0
Serial clock I/O pin for I2C 0 (devices with C-suffix)
FRCK1
Input for the 16-bit I/O Timer 1
54
P30
G
General purpose I/O port. The register can be set to select whether to use
a pull-up resistor. This function is enabled in single-chip mode.
ALE
Address latch enable output pin. This function is enabled when external bus
is enabled.
IN4
Data sample input pin for input capture ICU4.
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