參數(shù)資料
型號： MB90F352PFV
廠商： FUJITSU LTD
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP64
封裝： PLASTIC, LQFP-64
文件頁數(shù)： 12/64頁
文件大?。?/td> 800K
代理商： MB90F352PFV
MB90350 Series
2
s FEATURES
Clock
Built-in PLL clock frequency multiplication circuit
Selection of machine clocks (PLL clocks) is allowed among frequency division by two on oscillation clock, and
multiplication of 1 to 6 times of oscillation clock (for 4 MHz oscillation clock, 4 MHz to 24 MHz).
Operation by sub-clock (up to 50 kHz : 100 kHz oscillation clock divided by two) is allowed. (devices without
S-suffix only)
Minimum execution time of instruction : 42 ns (when operating with 4-MHz oscillation clock, and 6-time multi-
plied PLL clock).
16 Mbyte CPU memory space
24-bit internal addressing
External Bus Interface
4 MByte external memory space
Instruction system best suited to controller
Wide choice of data types (bit, byte, word, and long word)
Wide choice of addressing modes (23 types)
Enhanced multiply-divide instructions and RETI instructions
Enhanced high-precision computing with 32-bit accumulator
Instruction system compatible with high-level language (C language) and multitask
Employing system stack pointer
Enhanced various pointer indirect instructions
Barrel shift instructions
Increased processing speed
4-byte instruction queue
Powerful interrupt function
Powerful 8-level, 34-condition interrupt feature
Up to 8 channels external interrupts are supported
Automatic data transfer function independent of CPU
Extended intelligent I/O service function (EI2OS) : up to 16 channels
DMA : up to 16 channels
Low power consumption (standby) mode
Sleep mode (a mode that halts CPU operating clock)
Main timer mode (a timebase timer mode switched from the main clock mode)
PLL timer mode (a timebase timer mode switched from the PLL clock mode)
Watch mode (a mode that operates sub clock and clock timer only)
Stop mode (a mode that stops oscillation clock and sub clock)
CPU blocking operation mode
Process
CMOS technology
I/O port
General-purpose input/output port (CMOS output)
- 49 ports (devices without S-suffix)
- 51 ports (devices with S-suffix)
(Continued)
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