MB90350 Series
25
(Continued)
Address
Register
Abbrevia-
tion
Access
Resource name
Initial value
5EH
Output Compare Control Status
Register 6
OCS6
R/W
Output Compare 6/7
0000XX00
5FH
Output Compare Control Status
Register 7
OCS7
R/W
0XX00000
60H
Timer Control Status Register 0
TMCSR0
R/W
16-bit Reload Timer
0
00000000
61H
Timer Control Status Register 0
TMCSR0
R/W
XXXX0000
62H
Timer Control Status Register 1
TMCSR1
R/W
16-bit Reload Timer
1
00000000
63H
Timer Control Status Register 1
TMCSR1
R/W
XXXX0000
64H
Timer Control Status Register 2
TMCSR2
R/W
16-bit Reload Timer
2
00000000
65H
Timer Control Status Register 2
TMCSR2
R/W
XXXX0000
66H
Timer Control Status Register 3
TMCSR3
R/W
16-bit Reload Timer
3
00000000
67H
Timer Control Status Register 3
TMCSR3
R/W
XXXX0000
68H
A/D Control Status Register 0
ADCS0
R/W
A/D Converter
000XXXX0
69H
A/D Control Status Register 1
ADCS1
R/W
0000000X
6AH
Data Register 0
ADCR0
R
00000000
6BH
Data Register 1
ADCR1
R
XXXXXX00
6CH
A/D Setting Register 0
ADSR0
R/W
00000000
6DH
A/D Setting Register 1
ADSR1
R/W
00000000
6EH
Reserved
6FH
ROM Mirroring Register
ROMM
W
ROM Mirror
XXXXXXX1
70H to 7FH
Reserved
80H to 8FH Reserved for CAN Interface 1. Refer to “s CAN CONTROLLERS”
90H to 9AH
Reserved
9BH
DMA Descriptor Channel Specification
Register
DCSR
R/W
DMA
00000000
9CH
DMA Status Register L
DSRL
R/W
00000000
9DH
DMA Status Register H
DSRH
R/W
00000000
9EH
Program Address Detection Control
Status Register 0
PACSR0
R/W
Address Match
Detection 0
00000000
9FH
Delayed Interrupt/Release
DIRR
R/W
Delayed Interrupt
00000000
A0H
Low-power Mode Control Register
LPMCR
W,R/W
Low Power Control
Circuit
00011000
A1H
Clock Selection Register
CKSCR
R,R/W
Low Power Control
Circuit
11111100
A2H, A3H
Reserved
A4H
DMA Stop Status Register
DSSR
R/W
DMA
00000000