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參數(shù)資料
| 型號： | MB90F334APFF |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-bit Proprietary Microcontroller |
| 中文描述： | 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP120 |
| 封裝： | PLASTIC, LQFP-120 |
| 文件頁數(shù)： | 7/116頁 |
| 文件大小： | 632K |
| 代理商： | MB90F334APFF |
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MB90330 Series
7
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PIN DESCRIPTION
(Continued)
Pin no.
LQFP
Pin name
Circuit
type*
Function
108, 107
X0, X1
A
Terminals to connect the oscillator.
When connecting an external clock, leave the X1 pin side unconnected.
32 kHz oscillation terminals.
External reset input pin.
General purpose input/output port.
The ports can be set to be added with a pull-up resistor (RD00 to RD07
=
1)
by the pull-up resistor setting register (RDR0). (When the power output is
set, it is invalid.)
Function as an I/O pin for the low-order external address and data bus in
multiplex mode.
Function as an output pin for the low-order external data bus in non-
multiplex mode.
General purpose input/output port.
The ports can be set to be added with a pull-up resistor (RD10 to RD13 = 1)
by the pull-up resistor setting register (RDR1). (When the power output is
set, it is invalid.)
Function as an I/O pin for the high-order external address and data bus in
multiplex mode.
Function as an output pin for the high-order external data bus in non-
multiplex mode.
General purpose input/output port.
The ports can be set to be added with a pull-up resistor (RD14 to RD17 = 1)
by the pull-up resistor setting register (RDR1). (When the power output is
set, it is invalid.)
Function as an I/O pin for the high-order external address and data bus in
multiplex mode.
Function as an output pin for the high-order external data bus in non-
multiplex mode.
This is a general purpose I/O port. When the bits of external address output
control register (HACR) are set to “1” in external bus mode, these pins
function as general purpose I/O ports.
When the bits of external address output control register (HACR) are set to
“0” in multiplex mode, these pins function as address high output pins (A16
to A19).
When the bits of external address output control register (HACR) are set to
“0” in non-multiplex mode, these pins function as address high output pins
(A16 to A19).
13, 14
90
X0A, X1A
RST
A
F
93 to 100
P00 to P07
H
AD00 to AD07
D00 to D07
101 to 104
P10 to P13
H
AD08 to AD11
D08 to D11
109 to 112
P14 to P17
H
AD12 to D15
D12 to D15
113 to 116
P20 to P23
D
A16 to A19
A16 to A19
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MB90F334APMC1-GE1 | 制造商:FUJITSU 功能描述: |
| MB90F334APMC1-G-SPE1 | 制造商:FUJITSU 功能描述: |
| MB90F334APMC-G-JNE1 | 制造商:FUJITSU 功能描述: |
| MB90F334APMC-G-SNE1 | 制造商:FUJITSU 功能描述: |
| MB90F334APMC-G-SPE1 | 制造商:FUJITSU 功能描述: |
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