
MB90330 Series
15
■
HANDLING DEVICES
1.
Preventing latchup and turning on power supply
Latchup may occur on CMOS IC under the following conditions:
If a voltage higher than V
CC
or lower than V
SS
is applied to input and output pins.
A voltage higher than the rated voltage is applied between V
CC
and V
SS
.
If the AV
CC
power supply is turned on before the V
CC
voltage.
Ensure that you apply a voltage to the analog power supply at the same time as V
CC
or after you turn on the
digital power supply (when you perform power-off, turn off the analog power supply first or at the same time as
V
CC
and the digital power supply).
If latch-up occurs, the supply current increases rapidly, sometimes resulting in thermal breakdown of the device.
Use meticulous care not to let any voltage exceed the maximum rating.
Treatment of unused pins
2.
Leaving unused input pins unconnected can cause abnormal operation or latchup, leading to permanent damage.
Unused input pins should always be pulled up or down through resistance of at least 2 k
. Any unused input/
output pins may be set to output mode and left open, or set to input mode and treated the same as unused input
pins. If there is unused output pin, make it to open.
Treatment of power supply pins on models with A/D converters
Even when the A/D converters are not in use, be sure to make the necessary connections AV
CC
=
AVRH
=
V
CC
,
and AV
SS
=
V
SS
.
About the attention when the external clock is used
Using external clock
3.
4.
5.
Treatment of power supply pins (V
CC
/V
SS
)
In products with multiple V
CC
or V
SS
pins, the pins of the same potential are internally connected in the device
to avoid abnormal operations including latch-up. However, you must connect the pins to external power supply
and a ground line to lower the electro-magnetic emission level, to prevent abnormal operation of strobe signals
caused by the rise in the ground level, and to conform to the total output current rating.
Moreover, connect the current supply source with the V
CC
and V
SS
pins of this device at the low impedance.
It is also advisable to connect a ceramic bypass capacitor of approximately 0.1
μ
F between V
CC
and V
SS
near
this device.
About Crystal oscillator circuit
6.
Noise near the X0/X1 pins and X0A/X1A pins may cause the device to malfunction. Design the printed circuit
board so that X0/X1 pins and X0A/X1A pins, the crystal oscillator (or the ceramic oscillator) and the bypass
capacitor to ground are located as close to the device as possible.
It is strongly recommended to design the PC board artwork with the X0/X1 pins and X0A/X1A pins surrounded
by ground plane because stable operation can be expected with such a layout.
X0
X1
OPEN