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參數(shù)資料
| 型號： | MB90F244PFT-G |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Octal Edge-Triggered D-type Flip-Flops With Clock Enable 20-LCCC -55 to 125 |
| 中文描述： | 16-BIT, FLASH, 50 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | PLASTIC, TQFP-80 |
| 文件頁數(shù)： | 6/67頁 |
| 文件大小： | 1403K |
| 代理商： | MB90F244PFT-G |
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MB90F244
6
Pin no.
TQFP-80*
19
Pin name
Circuit
type
Function
P41
F
General-purpose I/O port
This function is valid when the upper address control register
specification is “port”.
External address bus output pin of the bit 17
This function is valid when the corresponding bit of the upper
address control register specification is “address”.
Address input pin for each operation command
This function is valid in the flash memory mode.
General-purpose I/O port
This function is valid when the corresponding bit of the upper
address control register specification is “port”.
External address bus output pin of the bit 18
This function is valid when the corresponding bit of the upper
address control register specification is “address”.
UART #0 data input pin
During UART #0 input operations, these inputs may be used at
any time; therefore, it is necessary to stop output by other
functions on this pin, except when using them for output
deliberately.
Address input pin for each operation command
This function is valid in the flash memory mode.
General-purpose I/O port
This function is valid when the UART #0 data output is disabled
and the corresponding bit of the upper address control register
specification is “port”.
External address bus output pin of the bit 19
This function is valid when the UART #0 data output is disabled
and the corresponding bit of the upper address control register
specification is “address”.
UART #0 data output pin
This function is valid when the UART #0 data output is enabled.
General-purpose I/O port
This function is valid when the UART #0 clock output is
disabled and the corresponding bit of the upper address control
register specification is “port”.
External address bus output pin of the bit 20
This function is valid when the UART #0 clock output is
disabled and the corresponding bit of the upper address control
register specification is “address”.
UART #0 clock I/O pin
A17
AQ17
20
P42
F
A18
SID0
AQ18
21
P43
G
A19
SOD0
22
P44
G
A20
SCK0
*: FPT-80P-M15
(Continued)
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