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參數(shù)資料
| 型號： | MB90670 |
| 廠商： | Fujitsu Limited |
| 英文描述： | Scan Test Devices With Octal Bus Transceivers And Registers 28-CDIP -55 to 125 |
| 中文描述： | 16位微控制器專有 |
| 文件頁數(shù)： | 17/106頁 |
| 文件大?。?/td> | 1648K |
| 代理商： | MB90670 |
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MB90670/675 Series
17
(Continued)
*1: FPT-80P-M05
*2: FPT-80P-M06
*3: FPT-100P-M05
*4: FPT-100P-M06
Pin no.
QFP
-80*
2
Pin name
Circuit type
Function
LQFP
-80*
1
LQFP
-100*
3
QFP
-100*
4
25
27
24
26
P47
E
(CMOS/H)
General-purpose I/O port
This function is always valid.
Trigger input pin of the 8/10-bit A/D converter
Because this input is used as required when the
8/10-bit A/D converter is performing input opera-
tions, and it is necessary to stop outputs by other
functions unless such outputs are made intention-
ally.
I/O port of an open-drain type
The input function is valid when the analog input
enable register is set to select a port.
ATG
30, 31,
33, 34,
35 to 38
32, 33,
35, 36,
37 to 40
36, 37,
38, 39,
41 to 44
38, 39,
40, 41,
43 to 46
P50, P51,
P52, P53,
P54 to P57
AN0, AN1,
AN2, AN3,
AN4 to AN7
C
(CMOS/H)
Analog input pins of the 8/10-bit A/D converter
This function is valid when the analog input en-
able register is set to select AD.
General-purpose I/O port
This function is always valid.
Request input pins of the DTP/external interrupt
circuit
Because this input is used as required when the
DTP/external interrupt circuit is performing input
operations, and it is necessary to stop outputs
from other functions unless such outputs are
made intentionally.
General-purpose I/O port
This function is always valid.
Sample data input pins for ICU0 to ICU3
Because this input is used as required when the
input capture (ICU) is performing input opera-
tions, and it is necessary to stop outputs from oth-
er functions unless such outputs are made
intentionally.
General-purpose I/O port
This function is valid when waveform output from
the output compare (OCU) is disabled.
Waveform output pins of OCU0 and OCU1
This function is valid when waveform output from
the output compare (OCU) is enabled and output
from the port is selected.
43 to 46 45 to 48 51 to 54 53 to 56
P60 to P63
E
(CMOS/H)
INT0 to
INT3
47 to 50 49 to 52 55 to 58 57 to 60
P64 to P67
E
(CMOS/H)
ASR0 to
ASR3
51 to 58 53 to 60 59 to 66 61 to 68
P70 to P77
E
(CMOS/H)
DOT0 to
DOT7
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