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參數(shù)資料
| 型號(hào)： | MB90670 |
| 廠商： | Fujitsu Limited |
| 英文描述： | Scan Test Devices With Octal Bus Transceivers And Registers 28-CDIP -55 to 125 |
| 中文描述： | 16位微控制器專有 |
| 文件頁數(shù)： | 14/106頁 |
| 文件大?。?/td> | 1648K |
| 代理商： | MB90670 |
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MB90670/675 Series
14
(Continued)
*1: FPT-80P-M05
*2: FPT-80P-M06
*3: FPT-100P-M05
*4: FPT-100P-M06
Pin no.
QFP
-80*
2
Pin name Circuit type
Function
LQFP
-80*
1
LQFP
-100*
3
QFP
-100*
4
5, 6
7, 8
3, 4
5, 6
P24, P25
E
(CMOS/H)
General-purpose I/O port
This function is always valid.
Event input pins of 16-bit reload timer 0 and 1
Because this input is used as required when the
16-bit reload timer is performing input operations,
and it is necessary to stop outputs by other func-
tions unless such outputs are made intentionally.
General-purpose I/O port
This function is valid when outputs from 16-bit re-
load timer 0 and 1 are disabled.
Output pins for 16-bit reload timer 0 and 1
This function is valid when output from 16-bit re-
load timer 0 and 1 are enabled.
General-purpose I/O port
This function is valid in the single-chip mode.
Address latch enable output pin
This function is valid in the mode where the exter-
nal bus is valid.
General-purpose I/O port
This function is valid in the single-chip mode.
Read strobe output pin for the data bus
This function is valid in the mode where the exter-
nal bus is valid.
General-purpose I/O port
This function is valid in the single-chip mode or
WRL/WR pin output is disabled.
Write strobe output pin for the data bus
This function is valid when WRL/WR pin output is
enabled in the mode where external bus is valid.
WRL is used for holding the lower 8-bit for write
strobe in 16-bit access operations, while WR is
used for holding 8-bit data for write strobe in
8-bit access operations.
General-purpose I/O port
This function is valid in the single-chip mode, in the
external bus 8-bit mode, or WRH pin output is dis-
abled.
Write strobe output pin for the upper 8-bit of the
data bus
This function is valid when the external bus 16-bit
mode is selected in the mode where the external
bus is valid, and WRH output pin is enabled.
TIN0, TIN1
7, 8
9, 10
5, 6
7, 8
P26, P27
E
(CMOS/H)
TOT0,
TOT1
10
12
7
9
P30
B
(CMOS)
ALE
11
13
8
10
P31
B
(CMOS)
RD
12
14
10
12
P32
B
(CMOS)
WRL
WR
13
15
11
13
P33
B
(CMOS)
WRH
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