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參數(shù)資料
| 型號： | MB90662APFM |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | 0.65 MM PITCH, PLASTIC, QFP-64 |
| 文件頁數(shù)： | 229/284頁 |
| 文件大?。?/td> | 2703K |
| 代理商： | MB90662APFM |
2.1 CPU
44
Chapter 2: Hardware
s Expanded Intelligent I/O Service (EI2OS)
EI2OS is a set of automatic data transfer functions between I/O ports and memory, which accomplish
the same exchange of data as previous methods but in a direct memory access (DMA) style. This
method has the following advantages in comparison with the previous interrupt processing methods.
Elimination of need to write transfer programs, allowing reduction of overall program size.
No internal registers used for transfer, speeding up transfer processing by eliminating the need
to save register contents.
Transfer can be stopped according to I/O status, eliminating unnecessary data transfers.
Choice of increment or no update buffer addressing modes.
Choice of increment or no update I/O register addressing modes.
When EI2OS processing ends, processing branches automatically to the interrupt processing program as
soon as end conditions are set, allowing the user to determine the type of ending conditions to be used.
EI2OS functions are realized by a distributed hardware configuration located in two separate units. The
related registers and descriptors are apportioned among the two blocks as follows.
Interrupt control register: ............................................... located within the interrupt controller,
used to indicate ISD addresses.
Extended intelligent I/O service descriptor (ISD): ........ located in RAM, used to hold transfer
mode, I/O address and transfer count,
and buffer addresses.
Figure 2.1.28 shows an overview of extended intelligent I/O service operation.
Fig. 2.1.28 Overview of Extended Intelligent I/O Service
[CAUTION]
The IOA pointer can designate the area 000000H to 00FFFFH. The BAP pointer can
designate the area 000000H to FFFFFFH. The maximum data transfer designation by the data
counter (DCT) is 65536 bytes.
Memory space
I/O register
Buffer
I/O register
Peripheral
Interrupt request
Interrupt control register
Interrupt controller
ISD
by IOA
by BAP
(4)
(1)
(3)
resource
by ICS
(2)
(1) I/O register requests transfer
(2) The interrupt controller selects a
descriptor
(3) Transfer source and destination
are read from the descriptor
(4) Transfer is performed to/from I/O
memory locations
(5) The interrupt source is
automatically cleared
CPU
by DCT
(5)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MB90662AP-SH | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:16-bit Proprietary Microcontroller |
| MB90663A | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:16-bit Proprietary Microcontroller |
| MB90663APFM | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:16-bit Proprietary Microcontroller CMOS |
| MB90663AP-SH | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:16-bit Proprietary Microcontroller CMOS |
| MB90670 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:16-Bit Proprietary Microcontroller |
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