參數(shù)資料
型號(hào): MB90662APFM
元件分類(lèi): 微控制器/微處理器
英文描述: 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP64
封裝: 0.65 MM PITCH, PLASTIC, QFP-64
文件頁(yè)數(shù): 145/284頁(yè)
文件大小: 2703K
代理商: MB90662APFM
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3.5 Low Power Consumption Modes
224
Chapter 3:Operation
Each of the MB90660A low-power consumption modes and its operation are described as follows.
(1) Sleep Mode
q Transition to Sleep Mode
Transition to sleep mode is initiated by writing ‘1’ to the SLP bit, and ‘0’ to the STP bit in the low-
power consumption mode control register (LPMCR). Sleep mode stops only the clock signal feed to the
CPU, stopping the CPU while the internal peripheral resource circuits continue to operate.
If an interrupt request is generated at the time that ‘1’ is written to the SLP bit, the standby control
circuit will not execute transition to sleep mode. If the CPU status does not accept the interrupt, the next
instruction will be executed. If the interrupt is accepted, processing will immediately branch to the
interrupt processing routine.
In sleep mode, the contents of dedicated registers (such as accumulators) and internal RAM are
retained.
q Wake-up from Sleep Mode
The standby control circuit releases sleep mode at input of a reset signal or interrupt request. If wake-up
from sleep mode is performed by a reset source, the MB90660A will be in reset state when it returns
from sleep mode.
Wake-up from sleep mode will also be performed by the standby control circuit when any interrupt
stronger (higher) than level 7 is generated by an internal resource circuit. After wake-up, the same
processing is applied as for a normal interrupt. If the interrupt is accepted according to the values of the
I flag, ILM bit and interrupt control register (ICR), the CPU will execute interrupt processing. If the
interrupt is not accepted, execution will continue with the next instruction following the instruction that
caused the transition to sleep mode.
[CAUTION]
When interrupt processing is executed, the normal procedure is to first execute the
instruction following the instruction that caused the transition to sleep mode before
branching to interrupt processing.
(2) Watch Mode
q Transition to Watch Mode
When the MCS bit in the clock select register is set to ‘0’ and ‘1’ is written to the STP bit in the low
power consumption mode control register, the standby control circuit is set to place the MB90660A in
watch mode. In watch mode all operations other than the main oscillator and timebase timer stop, and
virtually all of the chip functions are shut down.
The SPL bit in the low power consumption mode control register can be used to control whether I/O
pins retain their immediately prior values, or are placed in high-impedance state.
If an interrupt request is generated when ‘1’ is written to the STP bit, the standby control circuit will not
make the transition to watch mode.
相關(guān)PDF資料
PDF描述
MB90662AP-SH 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PDIP64
MB90P663AP-SH 16-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PDIP64
MB90673PF 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP80
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MB90662AP-SH 制造商:FUJITSU 制造商全稱(chēng):Fujitsu Component Limited. 功能描述:16-bit Proprietary Microcontroller
MB90663A 制造商:FUJITSU 制造商全稱(chēng):Fujitsu Component Limited. 功能描述:16-bit Proprietary Microcontroller
MB90663APFM 制造商:FUJITSU 制造商全稱(chēng):Fujitsu Component Limited. 功能描述:16-bit Proprietary Microcontroller CMOS
MB90663AP-SH 制造商:FUJITSU 制造商全稱(chēng):Fujitsu Component Limited. 功能描述:16-bit Proprietary Microcontroller CMOS
MB90670 制造商:FUJITSU 制造商全稱(chēng):Fujitsu Component Limited. 功能描述:16-Bit Proprietary Microcontroller