參數(shù)資料
型號(hào)： MB90660A
廠商： Fujitsu Limited
英文描述： UL/CSA, T-BEAM, D-ON
中文描述： 16位微控制器專有的CMOS
文件頁(yè)數(shù)： 42/83頁(yè)
文件大?。?/td> 820K
代理商： MB90660A
42
MB90660A Series
9. Watchdog Timer and Timebase Timer Functions
The watchdog timer consists of a 2-bit watchdog counter using carry signals from the 18-bit timebase timer as
the clock source, a control register, and a watchdog reset controller.
In addition to an 18-bit timer, the timebase timer consists of a circuit for controlling interval interrupts. Note that
the timebase timer uses the main clock regardless of the status of the MCS bit within the CKSCR register.
(1) Register Configuration
(2) Block Diagram
bit
Read/Write
Initial value
PONR
–
WRST ERST SRST WTE
WT1
WT0
WDTC
(R)
(X)
(–)
(–)
(R)
(X)
(R)
(X)
(R)
(X)
(W)
(1)
(W)
(1)
(W)
(1)
7
6
5
4
3
2
1
0
Watchdog timer
control register
Address: 0000A8
H
bit
Read/Write
Initial value
Reserved
–
–
TBIE TBOF TBR TBC1 TBC0
TBTC
(–)
(1)
(–)
(–)
(–)
(–)
(R/W)
(0)
(R/W)
(0)
(W)
(1)
(R/W)
(0)
(R/W)
(0)
15
14
13
12
11
10
9
8
Timebase timer
control register
Address: 0000A9
H
TBTC
PONR
WRST
ERST
SRST
TBC0
TBR
TBIE
TBOF
TBC1
WT1
WT0
WTE
WDTC
Selector
Selector
AND
2-bit counter
CLR
OF
CLR
Watchdog reset
generator
to WDGRST
internal reset
generator
from power-on generator
RST pin
from RST bit of
STBYC register
Timebase
interrupt
Clock input
2
12
2
14
2
16
2
19
TBTRES
Timebase timer
2
12
2
14
2
16
2
19
Main clock
(OSC oscillation)
Q R
S
2
2
2
9
to PWM timer
F
2
M
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