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參數(shù)資料
| 型號： | MB90660A |
| 廠商： | Fujitsu Limited |
| 英文描述： | UL/CSA, T-BEAM, D-ON |
| 中文描述： | 16位微控制器專有的CMOS |
| 文件頁數(shù)： | 35/83頁 |
| 文件大小： | 820K |
| 代理商： | MB90660A |
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35
MB90660A Series
4. 10-bit, 8-channel A/D Converter (with 8-bit Resolution Mode)
This 10-bit, 8-channel A/D converter is used to convert analog input voltage to corresponding digital values. It
has the following features.
Conversion time: 6.13
μ
s per channel (includes sample and hold time at 98 machine cycles/machine clock
of 16 MHz)
Sample hold time: 3.75
μ
s per channel (60 machine cycles per machine clock of 16 MHz)
RC-type sequential approximation conversion with sample and hold circuits
10-bit or 8-bit resolution
Analog input can be selected from 8 channels
Single conversion mode
: One channel selected for conversion
Scan conversion mode
: Consecutive multiple channels converted (programmable with max. eight
channels)
Repetitive conversion mode : Data on the specified channel is converted repeatedly
Stop conversion mode
: Once one channel is converted, operations stop and the device waits until
started again (conversion start can be synchronized)
At the end of each A/D conversion, an interrupt request to the CPU can be generated. This interrupt can be
used to activate I
2
OS or transfer A/D conversion results to memory, making it useful when continuous
processing is desired.
Conversion can be triggered by software, an external trigger (falling edge), and/or a timer (rising edge).
(1) Register Configuration
bit
Read/Write
Initial value
BUSY
INT
INTE PAUS STS1 STS0 STRT
Reserved
ADCS
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(W)
(0)
(–)
(0)
15
14
13
12
11
10
9
8
A/DControl status register (upper)
Address: 00002D
H
bit
Read/Write
Initial value
MD1
MD0 ANS2 ANS1 ANS0 ANE2 ANE1 ANE0
ADCS
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
(R/W)
(0)
7
6
5
4
3
2
1
0
A/D Control status register (lower)
Address: 00002C
H
bit
Read/Write
Initial value
S10
–
–
–
–
–
D9
D8
ADCR
(R/W)
(0)
(R)
(0)
(R)
(0)
(R)
(0)
(R)
(0)
(R)
(0)
(R)
(X)
(R)
(X)
15
14
13
12
11
10
9
8
A/D Data register (upper)
Address: 00002F
H
bit
Read/Write
Initial value
D7
D6
D5
D4
D3
D2
D1
D0
ADCR
(R)
(X)
(R)
(X)
(R)
(X)
(R)
(X)
(R)
(X)
(R)
(X)
(R)
(X)
(R)
(X)
7
6
5
4
3
2
1
0
A/D Data register (lower)
Address: 00002E
H
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