參數(shù)資料
型號: MB89PV630C-SH
元件分類: 微控制器/微處理器
英文描述: 8-BIT, 10 MHz, MICROCONTROLLER, CDIP64
封裝: CERAMIC, MDIP-64
文件頁數(shù): 133/153頁
文件大小: 7326K
代理商: MB89PV630C-SH
HARDWARE CONFIGURATION
2-57
[Bit 1] TCIE: Interrupt-request output-enable bit
Bit 1 is used to enable and disable interrupt output to the CPU. When the bit is 1, an interrupt request is
output if the interrupt flag TCEF (bit 2) is set to 1. When the bit is 0, interrupt-request output is disabled.
[Bit 0] TCS: Count start bit (counter-enable bit)
Bit 0 is used to start and stop the counter. When 1 is written at this bit, the TCR is enabled for counting
and the value of the counter is incremented by the count clock. When 0 is written, the TCR stops count-
ing to hold the value of the counter.
(b) Timer-count register (TCR)
The TCR is a 16-bit binary up counter. TCHR is used for upper bytes; the TCLR is used for lower bytes.
Writing to the counter should be performed when counting stops (TCS bit (bit 0) of TMCR = 0). To read the
counter, always use the word transfer instructions (MOVW A, dir, etc.).
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