參數(shù)資料
型號(hào): MB84VD2009
廠商: Fujitsu Limited
英文描述: 8M (x 16) FLASH MEMORY & 2M (x 16) STATIC RAM
中文描述: 8米(× 16)閃存
文件頁(yè)數(shù): 24/30頁(yè)
文件大?。?/td> 393K
代理商: MB84VD2009
24
MB84VD2008
-10
/MB84VD2009
-10
Write Cycle (SRAM)
Parameter
Symbol
Write Cycle (Note 4) (WE control) (SRAM)
Parameter Description
Min.
Max.
Unit
t
WC
Write Cycle Time
85
ns
t
WP
Write Pulse Width
60
ns
t
CW
Chip Enable to End of Write
75
ns
t
BW
UB, LB Valid to End of Write
55
ns
t
AS
Address Setup Time
0
ns
t
WR
Write Recovery Time
0
ns
t
ODW
WE Low to Output High-Z
35
ns
t
OEW
WE High to Output Active
0
ns
t
DS
Data Setup Time
35
ns
t
DH
Data Hold Time
0
ns
t
WC
t
AS
t
WP
t
WR
t
CW
t
ODW
t
OEW
t
DS
t
DH
VALID DATA IN
ADDRESSES
WE
CEs
D
OUT
D
IN
Notes:
2. If CEs goes LOW coincident with or after WE goes LOW, the output will remain at high
impedance.
3. If CEs goes HIGH coincident with or before WE goes HIGH, the output will remain at
high impedance.
4. If OE is HIGH during the write cycle, the outputs will remain at high impedance.
5. Because I/O signals may be in the output state at this Time, input signals of reverse
polarity must not be applied.
Note 2
Note 5
Note 3
Note 5
UB, LB
t
BW
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