參數(shù)資料
型號： MB81164442A-67L
廠商： Fujitsu Limited
英文描述： CMOS 4×4M×16 BIT Synchronous Dynamic Random Access Memory (SDRAM)(CMOS 4×4M×16 位同步動態(tài)RAM)
中文描述： 的CMOS 4 × 4米× 16位同步動態(tài)隨機(jī)存取存儲器（SDRAM）（的CMOS 4 × 4米× 16位同步動態(tài)RAM）的
文件頁數(shù)： 42/46頁
文件大?。?/td> 642K
代理商： MB81164442A-67L
42
MB81164442A-125/-100/-84/-67/-125L/-100L/-84L/-67L
READA
ACTV
NOP or DESL
ACTV
Q1
Q2
t
RAS
(min)
2 clocks
(same value as BL)
t
RP
(min)
TIMING DIAGRAM – 13 : READ WITH AUTO-PRECHARGE
(EXAPLE @ CL = 2, BL = 2 Applied to same bank)
CLK
Command
DQM
DQ
Note:
Precharge at read with Auto-precharge command (READA) is started from “BL” number of clocks after the READA
command is asserted.
WRITA
ACTV
ACTV
D1
D2
t
RP
(min)
I
RWL
TIMING DIAGRAM – 14 : WRITE WITH AUTO-PRECHARGE
(EXAMPLE @ CL = 2, BL = 2 Applied to same bank)
CLK
Command
DQM
DQ
Note:
In a case of CL = 2, precharge at write with Auto-precharge command (WRITA) is started from “BL” number of clocks after
the WRITA command is asserted. In a case of CL = 3, precharge at write with Auto-precharge command is started from
“BL+1” number of clocks after the WRITA command.
Even if the final data is masked by DQM, the precharge does not start the clock of final data input.
Once Auto-precharge command is asserted, no new command within the same bank can be issued.
Auto-precharge command doesn’t affect at full column burst operation except Burst Read & Single Write mode.
NOP or DESL
2 clocks
(same value as BL)
相關(guān)PDF資料
PDF描述
MB81164442A-84 CMOS 4×4M×16 BIT Synchronous Dynamic Random Access Memory (SDRAM)(CMOS 4×4M×16 位同步動態(tài)RAM)
MB81164442A-84L CMOS 4×4M×16 BIT Synchronous Dynamic Random Access Memory (SDRAM)(CMOS 4×4M×16 位同步動態(tài)RAM)
MB8117400A-50 CMOS 4 M ×4 BIT Fast Page Mode DRAM(CMOS 4 M ×4位快速頁面存取模式動態(tài)RAM)
MB8117400A-60 CMOS 4 M ×4 BIT Fast Page Mode DRAM(CMOS 4 M ×4位快速頁面存取模式動態(tài)RAM)
MB8117400A-70 CMOS 4 M ×4 BIT Fast Page Mode DRAM(CMOS 4 M ×4位快速頁面存取模式動態(tài)RAM)
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