42
MB582A/583A
I
PRECAUTIONS
(1) For the V
CC
supplied to the MB582A/583A, use a stable power supply. If spike noise enters the power supply,
the MB582A/583A may fail to perform stable operation.
1-1. The power supply for this LSI should be separated from the power supply for any other LSI not to receive
digital noise (as shown in the following illustration).
1-2. To prevent spike noise from another LSIs, add sufficient capacitance also to another LSIs (for example, 10
μ
F for each of the LSIs).
1-3. Connect a bypass capacitor of about 0.1
μ
F closer (as within 10 mm as possible) to the pins between each
V
CC
and GND.
Between AV
CC
and AGND which are an analog V
CC
and an analog GND, in particular, connect a bypass
capacitor closer (within 10 mm) to the LSI pins.
For the power source, attach a capacitor with a large value of about 10
μ
F to provide stable power.
(2) A external filter capacitor between FIL1 and FIL2 must be placed closer (as within 15 mm as possible) to the
LSI pins. This capacitor must be wired by minimum routing. The wiring should not cross any other pattern.
The pins are particularly sensitive to external noise. Placing this capacitor at lower-noise positions ensure their
stable operations. In addition, routing GND patterns around the pins and the capacitor greatly contributes to
stable operation.
(3) Letting the wiring for reference clock signals supplied to the REFCLK and PICLK cross other patterns increases
jitter, leading to unstable operation.
Note also that input of a reference clock signal with large undershoot results in unstable operation.
Board V
CC
pin
10
μ
F or more
10
μ
F or more
4.7
μ
H or more
4.7
μ
H or more
Another logic LSI’s V
CC
pattern
Transceiver’s V
CC
pattern
Connection example
10
μ
F or more
Note: Suppress the total voltage drop by the inductor to be 50 mV or less.
(Inductor allowable current = 0.5 A or more; Inductor total DC resistance = 0.1
or less)