參數(shù)資料
型號(hào)： MB15F73ULPVA
廠商： FUJITSU LTD
元件分類(lèi)： XO, clock
英文描述： Dual Serial Input PLL Frequency Synthesizer
中文描述： PLL FREQUENCY SYNTHESIZER, 2250 MHz, PBCC20
封裝： PLASTIC, BCC-20
文件頁(yè)數(shù)： 3/27頁(yè)
文件大?。?/td> 152K
代理商： MB15F73ULPVA
MB15F73UL
3
I
PIN DESCRIPTION
Pin no.
Pin
name
I/O
Descriptions
TSSOP
BCC
1
19
OSC
IN
I
The programmable reference divider input pin. TCXO should be connected with
an AC coupling capacitor.
2
20
GND
Ground pin for OSC input buffer and the shift register circuit.
3
1
fin
IF
I
Prescaler input pin for the IF-PLL.
Connection to an external VCO should be AC coupling.
4
2
Xfin
IF
I
Prescaler complimentary input for the IF-PLL section.
This pin should be grounded via a capacitor.
5
3
GND
IF
Ground pin for the IF-PLL section.
6
4
V
CCIF
Power supply voltage input pin for the IF-PLL section (except for the charge
pump circuit) , the shift register and the oscillator input buffer.
7
5
PS
IF
I
Power saving mode control pin for the IF-PLL section. This pin must be set at “L”
when the power supply is started up. (Open is prohibited.)
PS
IF
=
“H” ; Normal mode/PS
IF
=
“L” ; Power saving mode
Power supply voltage input pin for the IF-PLL charge pump.
8
6
Vp
IF
O
9
7
Do
IF
Charge pump output for the IF-PLL section.
10
8
LD/fout
O
Lock detect signal output (LD) /phase comparator monitoring output (fout) pin.
The output signal is selected by LDS bit in a serial data.
LDS bit
=
“H” ; outputs fout signal/LDS bit
=
“L” ; outputs LD signal
Charge pump output for the RF-PLL section.
11
9
Do
RF
O
12
10
Vp
RF
Power supply voltage input pin for the RF-PLL charge pump.
13
11
PS
RF
I
Power saving mode control for the RF-PLL section. This pin must be set at “L”
when the power supply is started up. (Open is prohibited. )
PS
RF
=
“H” ; Normal mode/PS
RF
=
“L” ; Power saving mode
Power supply voltage input pin for the RF-PLL section (except for the charge
pump circuit)
14
12
V
CCRF
15
13
GND
RF
Ground pin for the RF-PLL section
16
14
Xfin
RF
I
Prescaler complimentary input pin for the RF-PLL section.
This pin should be grounded via a capacitor.
17
15
fin
RF
I
Prescaler input pin for the RF-PLL.
Connection to an external VCO should be via AC coupling.
18
16
LE
I
Load enable signal input pin (with the schmitt trigger circuit)
When LE is set “H”, data in the shift register is transferred to the corresponding
latch according to the control bit in a serial data.
19
17
Data
I
Serial data input pin (with the schmitt trigger circuit)
Data is transferred to the corresponding latch (IF-ref. counter, IF-prog. counter,
RF-ref. counter, RF-prog. counter) according to the control bit in a serial data.
20
18
Clock
I
Clock input pin for the 23-bit shift register (with the schmitt trigger circuit)
One bit data is shifted into the shift register on a rising edge of the clock.
相關(guān)PDF資料
PDF描述
MB15F73UL ASSP Dual Serial Input PLL Frequency Synthesizer
MB15F73SPPFT Dual Serial Input PLL Frequency Synthesizer
MB15F73SPPV Dual Serial Input PLL Frequency Synthesizer
MB15F73SP Dual Serial Input PLL Frequency Synthesizer
MB15F73UV Dual Serial Input PLL Frequency Synthesizer
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MB15F73ULPVA-GE1 功能描述:IC SYNTHESIZR PLL DL INP 20TSSOP RoHS:是 類(lèi)別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 產(chǎn)品變化通告:Product Discontinuation 04/May/2011 標(biāo)準(zhǔn)包裝:96 系列:- 類(lèi)型:時(shí)鐘倍頻器，零延遲緩沖器 PLL:帶旁路 輸入:LVTTL 輸出:LVTTL 電路數(shù):1 比率 - 輸入:輸出:1:8 差分 - 輸入:輸出:無(wú)/無(wú) 頻率 - 最大:133.3MHz 除法器/乘法器:是/無(wú) 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:管件 其它名稱(chēng):23S08-5HPGG
MB15F73UV 制造商:FUJITSU 制造商全稱(chēng):Fujitsu Component Limited. 功能描述:Dual Serial Input PLL Frequency Synthesizer
MB15F73UVPVB 制造商:FUJITSU 制造商全稱(chēng):Fujitsu Component Limited. 功能描述:Dual Serial Input PLL Frequency Synthesizer
MB15F74UL 制造商:FUJITSU 制造商全稱(chēng):Fujitsu Component Limited. 功能描述:Dual Serial Input PLL Frequency Synthesizer
MB15F74ULPVA 制造商:FUJITSU 制造商全稱(chēng):Fujitsu Component Limited. 功能描述:Dual Serial Input PLL Frequency Synthesizer
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