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參數(shù)資料
| 型號： | MB15F73ULPVA |
| 廠商： | FUJITSU LTD |
| 元件分類： | XO, clock |
| 英文描述： | Dual Serial Input PLL Frequency Synthesizer |
| 中文描述： | PLL FREQUENCY SYNTHESIZER, 2250 MHz, PBCC20 |
| 封裝： | PLASTIC, BCC-20 |
| 文件頁數(shù)： | 11/27頁 |
| 文件大小： | 152K |
| 代理商： | MB15F73ULPVA |
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MB15F73UL
11
3.
Power Saving Mode (Intermittent Mode Control Circuit)
Status
PS pin
The intermittent mode control circuit reduces the PLL power consumption.
By setting the PS pin low, the device enters into the power saving mode, reducing the current consumption. See
the Electrical Characteristics chart for the specific value.
The phase detector output, Do, becomes high impedance.
For the dual PLL, the lock detector, LD, is as shown in the LD Output Logic table.
Setting the PS pin high, releases the power saving mode, and the device works normally.
The intermittent mode control circuit also ensures a smooth startup when the device returns to normal operation.
When the PLL is returned to normal operation, the phase comparator output signal is unpredictable. This is
because of the unknown relationship between the comparison frequency (fp) and the reference frequency (fr)
which can cause a major change in the comparaor output, resulting in a VCO frequency jump and an increase
in lockup time.
To prevent a major VCO frequency jump, the intermittent mode control circuit limits the magnitude of the error
signal from the phase detector when it returns to normal operation.
Notes :
When power (VCC) is first applied, the device must be in standby mode, PS
=
Low, for at least 1
μ
s.
PS pin must be set “L” at Power-ON.
Normal mode
H
Power saving mode
L
ON
OFF
V
CC
Clock
Data
LE
PS
(1)
(2)
(3)
t
PS
≥
100 ns
t
V
≥
1
μ
s
(1) PS
=
L (power saving mode) at Power-ON
(2) Set serial data at least 1
μ
s after the power supply becomes stable (V
CC
≥
2.2 V) .
(3) Release power saving mode (PS
IF
, PS
RF
: “L”
→
“H”) at least 100 ns later after setting serial data.
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| MB15F73UL | ASSP Dual Serial Input PLL Frequency Synthesizer |
| MB15F73SPPFT | Dual Serial Input PLL Frequency Synthesizer |
| MB15F73SPPV | Dual Serial Input PLL Frequency Synthesizer |
| MB15F73SP | Dual Serial Input PLL Frequency Synthesizer |
| MB15F73UV | Dual Serial Input PLL Frequency Synthesizer |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MB15F73ULPVA-GE1 | 功能描述:IC SYNTHESIZR PLL DL INP 20TSSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 產(chǎn)品變化通告:Product Discontinuation 04/May/2011 標準包裝:96 系列:- 類型:時鐘倍頻器，零延遲緩沖器 PLL:帶旁路 輸入:LVTTL 輸出:LVTTL 電路數(shù):1 比率 - 輸入:輸出:1:8 差分 - 輸入:輸出:無/無 頻率 - 最大:133.3MHz 除法器/乘法器:是/無 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:16-TSSOP 包裝:管件 其它名稱:23S08-5HPGG |
| MB15F73UV | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:Dual Serial Input PLL Frequency Synthesizer |
| MB15F73UVPVB | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:Dual Serial Input PLL Frequency Synthesizer |
| MB15F74UL | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:Dual Serial Input PLL Frequency Synthesizer |
| MB15F74ULPVA | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:Dual Serial Input PLL Frequency Synthesizer |
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