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參數(shù)資料
| 型號： | MB15F07SLPV1 |
| 廠商： | FUJITSU LTD |
| 元件分類： | XO, clock |
| 英文描述： | Dual Serial Input PLL Frequency Synthesizer |
| 中文描述： | PLL FREQUENCY SYNTHESIZER, 1100 MHz, PBCC16 |
| 封裝： | PLASTIC, BCC-16 |
| 文件頁數(shù)： | 8/27頁 |
| 文件大小： | 244K |
| 代理商： | MB15F07SLPV1 |
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8
MB15F07SL
I
FUNCTIONAL DESCRIPTION
The divide ratio can be calculated using the following equation:
f
VCO
= {(M
×
N) + A}
×
f
OSC
÷
R (A < N)
f
VCO
:
Output frequency of external voltage controlled oscillator (VCO)
M
:
Preset divide ratio of dual modulus prescaler (64 or 128 for PLL 1/PLL 2)
N
:
Preset divide ratio of binary 11-bit programmable counter (3 to 2,047)
A
:
Preset divide ratio of binary 7-bit swallow counter (0
≤
A
≤
127)
f
OSC
:
Reference oscillation frequency
R
:
Preset divide ratio of binary 14-bit programmable reference counter (3 to 16,383)
Serial Data Input
Serial data is entered using three pins, Data pin, Clock pin, and LE pin. Programmable dividers of PLL 1/PLL 2
sections, programmable reference dividers of PLL 1/PLL 2 sections are controlled individually.
Serial data of binary data is entered through Data pin.
On rising edge of Clock, one bit of serial data is transferred into the shift register. When the LE signal is taken high,
the data stored in the shift register is transferred to one of latch of them depending upon the control bit data setting.
Table 1. Control Bit
Shift Register Configuration
Control bit
Destination of serial data
CN1
CN2
L
L
The programmable reference counter for the PLL 1
H
L
The programmable reference counter for the PLL 2
L
H
The programmable counter and the swallow counter for the PLL 1
H
H
The programmable counter and the swallow counter for the PLL 2
Programmable Reference Counter
MSB
Data Flow
CN1, CN2
R1 to R14
T1, T2
CS
X
: Control bit
: Divide ratio setting bits for the programmable reference counter (3 to 16,383)[Table 2]
: Test purpose bit
: Charge pump currnet select bit
: Dummy bits (Set “0” or “1”)
[Table 1]
[Table 3]
[Table 9]
NOTE: Data input with MSB first.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
C
N
1
C
N
2
T
1
T
2
R
1
R
2
R
3
R
4
R
5
R
6
R
7
R
8
R
9
R
10
R
11
R
12
R
13
R
14
C
S
X
X
X
X
LSB
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MB15F08SL | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:Dual Serial Input PLL Frequency Synthesizer |
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| MB15F08SLPV1 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:Dual Serial Input PLL Frequency Synthesizer |
| MB15F63UL | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:Dual Serial Input PLL Frequency Synthesizer |
| MB15F63ULPVA1 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:Dual Serial Input PLL Frequency Synthesizer |
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