- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄377878 > MB15F07SLPV1 (FUJITSU LTD) Dual Serial Input PLL Frequency Synthesizer PDF資料下載
參數(shù)資料
| 型號： | MB15F07SLPV1 |
| 廠商： | FUJITSU LTD |
| 元件分類： | XO, clock |
| 英文描述： | Dual Serial Input PLL Frequency Synthesizer |
| 中文描述： | PLL FREQUENCY SYNTHESIZER, 1100 MHz, PBCC16 |
| 封裝： | PLASTIC, BCC-16 |
| 文件頁數(shù)： | 11/27頁 |
| 文件大小： | 244K |
| 代理商： | MB15F07SLPV1 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁當(dāng)前第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁
11
MB15F07SL
Table 8. LD/fout Output Select Data Setting
Table 9. Charge Pump Current Setting
Power Saving Mode (Intermittent Mode Control Circuit)
Table 10. PS Pin Setting
The intermittent mode control circuit reduces the PLL power consumption.
By setting the PS pin low, the device enters into the power saving mode, reducing the current consumption. See
the Electrical Characteristics chart for the specific value.
The phase detector output, Do, becomes high impedance.
For the dual PLL, the lock detector, LD, is as shown in the LD Output Logic table.
Setting the PS pin high, releases the power saving mode, and the device works normally.
The intermittent mode control circuit also ensures a smooth startup when the device returns to normal operation.
When the PLL is returned to normal operation, the phase comparator output signal is unpredictable. This is because
of the unknown relationship between the comparison frequency (fp) and the reference frequency (fr) which can
cause a major change in the comparator output, resulting in a VCO frequency jump and an increase in lockup time.
To prevent a major VCO frequency jump, the intermittent mode control circuit limits the magnitude of the error signal
from the phase detector when it returns to normal operation.
Notes:
When power (V
CC
) is first applied, the device must be in standby mode, PS = Low, for at least 1
μ
s.
PS pins must be set at “L” for Power-ON.
LDS
H
L
LD/fout output signal
fout (fr
1
/fr
2
, fp
1
/fp
2
) signals
LD signal
CS
H
L
Current value
±
6.0 mA
±
1.5 mA
PS pin
H
L
Status
Normal mode
Power saving mode
(1)
(2)
(3)
V
CC
Clock
Data
LE
PS
ON
tv
≥
1
μ
s
tps
≥
100 ns
OFF
(1) PS = L (power saving mode) at Power-ON
(2) Set serial data
1
μ
s
later after power supply remains stable (V
CC
>
2.2 V).
(3) Release power saving mode (PS:
“
L
”
→
“
H
”
) 100 ns later after setting serial data.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MB15F07SL | Dual Serial Input PLL Frequency Synthesizer |
| MB15F07SLPFV1 | Dual Serial Input PLL Frequency Synthesizer |
| MB15F08SL | Dual Serial Input PLL Frequency Synthesizer |
| MB15F08SLPFV1 | Dual Serial Input PLL Frequency Synthesizer |
| MB15F08SLPV1 | Dual Serial Input PLL Frequency Synthesizer |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MB15F08SL | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:Dual Serial Input PLL Frequency Synthesizer |
| MB15F08SLPFV1 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:Dual Serial Input PLL Frequency Synthesizer |
| MB15F08SLPV1 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:Dual Serial Input PLL Frequency Synthesizer |
| MB15F63UL | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:Dual Serial Input PLL Frequency Synthesizer |
| MB15F63ULPVA1 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:Dual Serial Input PLL Frequency Synthesizer |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。