參數(shù)資料
型號(hào)： MAXQ7670ATL+T
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 33/38頁(yè)
文件大?。?/td> 0K
描述： IC MCU W/10BIT ADC 40TQFN-EP
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 2,500
系列： MAXQ®
核心處理器： RISC
芯體尺寸： 16-位
速度： 16MHz
連通性： CAN，SPI
外圍設(shè)備： 欠壓檢測(cè)/復(fù)位，POR，PWM，WDT
輸入/輸出數(shù)： 7
程序存儲(chǔ)器容量： 64KB（32K x 16）
程序存儲(chǔ)器類型： 閃存
RAM 容量： 1K x 16
電壓 - 電源 (Vcc/Vdd)： 2.25 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 125°C
封裝/外殼： 40-WFQFN 裸露焊盤
包裝： 帶卷 (TR)
MAXQ7670
Microcontroller with 10-Bit ADC,
PGA, 64KB Flash, and CAN Interface
4
_______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(VDVDDIO = +5.0V, VAVDD = +3.3V, VDVDD = +2.5V, VREFADC = +3.3V, system clock = 16MHz. TA = TMIN to TMAX, unless otherwise
noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
PGA gain = 16V/V,
26.5 ADCCLK cycles at 4MHz
6.625
Channel Select Plus
Conversion Time
tACQ +
tCONV
PGA gain = 1V/V,
16 ADCCLK cycles at 4MHz
4
s
Turn-On Time
tRECOV
10
s
Aperture Delay
60
ns
Aperture Jitter
100
psP-P
At AIN0–AIN7, unipolar mode,
PGA gain = 1V/V
0VREFADC
At AIN0–AIN7, unipolar mode,
PGA gain = 16V/V
0
0.125
At AIN0–AIN7, bipolar mode,
PGA gain = 1V/V
-VREFADC
/2
+VREFADC
/2
Differential Input Voltage
Range
At AIN0–AIN7, bipolar mode,
PGA gain = 16V/V
-VREFADC
/32
+VREFADC
/32
V
Absolute Input Voltage Range
At AIN0–AIN7
0
VAVDD
V
Input Leakage Current
At AIN0–AIN7
±0.1
A
At AIN0–AIN7, PGA gain = 16V/V
50
Input-Referred Noise
At AIN0–AIN7, PGA gain = 1V/V
400
VRMS
VIN = 12mVP-P, PGA gain = 16V/V
33
Small-Signal Bandwidth (-3dB)
VIN = 200mVP-P, PGA gain = 1V/V
23
MHz
VIN = 150mVP-P, PGA gain =16V/V
33
Large-Signal Bandwidth (-3dB)
VIN = 2.5VP-P, PGA gain = 1V/V
19
MHz
Single-ended, any AIN0–AIN7,
PGA gain = 16V/V
16
Input Capacitance (Note 8)
Single-ended, any AIN0–AIN7,
PGA gain = 1V/V
13
pF
Input Common-Mode Rejection
Ratio
CMRR
AIN0–AIN7,
VCM = differential input range
75
dB
Power-Supply Rejection Ratio
PSRR
AVDD = 3.0V to 3.6V
90
dB
EXTERNAL REFERENCE INPUTS
REFADC Input Voltage Range
1.0
3.3
VAVDD
V
REFADC Leakage Current
ADC disabled
1
A
Input Capacitance
(Note 9)
20
pF
+3.3V (AVDD) LINEAR REGULATOR
AVDD Output Voltage
LRAPD = 0
3.15
3.3
3.45
V
No-Load Quiescent Current
LRAPD = 0, all internal analog
peripherals disabled
10
A
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