參數(shù)資料
型號: MAX9598CTL+
廠商: Maxim Integrated Products
文件頁數(shù): 7/36頁
文件大?。?/td> 0K
描述: IC SWITCH DUAL SCART 40TQFN
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 50
功能: 開關(guān)
電路: 2 x SCART
導(dǎo)通狀態(tài)電阻: 7 歐姆
電壓電源: 單/雙電源
電壓 - 電源,單路/雙路(±): 3 V ~ 3.6 V,±11.4 V ~ 12.6 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 40-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 40-TQFN-EP(6x6)
包裝: 管件
MAX9598
Low-Power Audio/Video Switch for
Dual SCART Connectors
______________________________________________________________________________________
15
Video Inputs
Whether the incoming video signal is AC-coupled or
DC-coupled into the MAX9598 depends upon the ori-
gin, format, and voltage range of the video signal.
Table 1 below shows the recommended connections.
Always AC-couple an external video signal through a
0.1F capacitor because its voltage is not well defined
(see the
Typical Application Circuit). For example, the
video transmitter circuit might have a different ground
than the video receiver, thereby level shifting the DC
bias. The 60Hz power line “hum” might cause the video
signal to slowly change DC bias.
Internal video signals that are between 0 and 1V can
be DC-coupled. Most video DACs generate video sig-
nals between 0 and 1V because the video DAC
sources current into a ground-referenced resistor. For
the minority of video DACs that generate video signals
between 2.3V and 3.3V because the video DAC sinks
current from a VVID-referenced resistor, AC-couple the
video signal to the MAX9598.
The MAX9598 restores the DC level of incoming, AC-
coupled video signals with either transparent sync-tip
clamps or bias circuits. When using an AC-coupled
input, the transparent sync-tip clamp automatically
clamps the input signal minimum to ground, preventing
it from going lower. A small current of 1A pulls down
on the input to prevent an AC-coupled signal from drift-
ing outside the input range of the part. Use sync-tip
clamps with CVBS, RGB, and luma signals.
The transparent sync-tip clamp is “transparent” when
the incoming video signal is DC-coupled and at or
above ground. Under such conditions, the clamp never
activates. Therefore, the outputs of video DACs that
typically generate signals between 0 and 1V can be
directly connected to the MAX9598 inputs.
The bias circuit accepts AC-coupled chroma, which is a
subcarrier with the color information modulated onto it.
The bias voltage of the bias circuits is 600mV.
ENC_R/C_IN and VCR_R/C_IN can receive either a red
video signal or a chroma video signal. Set the input con-
figuration by writing to bits 7 and 3 of the VCR Video
Input Control Register (08h). See Tables 8 and 14.
The MAX9598 also has video input detection. When
activated, activity detect circuits check if sync is pre-
sent on incoming CVBS signals. If so, then there is a
valid video signal. Read bits 0, 2, 4, and 5 of the Video
Activity Status Register (0Fh) to determine the status of
the CVBS inputs. See Table 19.
Video Reconstruction Filter
The video DAC outputs of the set-top box decoder chip
need to be lowpass-filtered to reject the out-of-band
noise. The MAX9598 integrates 6th-order, Butterworth
filters. The filter passband (±1dB) is typically 10MHz,
and the attenuation at 27MHz is 52dB. The filters are
suited for standard-definition video.
Video Outputs
The video output amplifiers can both source and sink
load current, allowing output loads to be DC- or AC-cou-
pled. The amplifier output stage needs around 300mV of
headroom from either supply rail. For video signals with
a sync pulse, the sync tip will typically be at 300mV, as
shown in Figure 4. For a chroma signal, the blank level
will typically be at 1.5V, as shown in Figure 5.
Table 1. Recommended Coupling for Incoming Video Signals and Input Circuit
Configuration. (Use a 0.1F Capacitor to AC-Couple a Video Signal into the MAX9598)
VIDEO ORIGIN
FORMAT
VOLTAGE RANGE (V)
COUPLING
INPUT CIRCUIT CONFIGURATION
External
CVBS
Unknown
AC
Transparent Sync Tip Clamp
External
RGB
Unknown
AC
Transparent Sync Tip Clamp
External
Y
Unknown
AC
Transparent Sync Tip Clamp
External
C
Unknown
AC
Bias Circuit
Internal
CVBS
0 to 1
DC
Transparent Sync Tip Clamp
Internal
R, G, B
0 to 1
DC
Transparent Sync Tip Clamp
Internal
Y, C
0 to 1
DC
Transparent Sync Tip Clamp
Internal
Y, Pb, Pr
0 to 1
DC
Transparent Sync Tip Clamp
Internal
CVBS
2.3 to 3.3
AC
Transparent Sync Tip Clamp
Internal
R, G, B
2.3 to 3.3
AC
Transparent Sync Tip Clamp
Internal
Y
2.3 to 3.3
AC
Transparent Sync Tip Clamp
Internal
C
2.3 to 3.3
AC
Bias Circuit
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