參數(shù)資料
型號: MAX9526ATJ+T
廠商: Maxim Integrated Products
文件頁數(shù): 2/38頁
文件大小: 0K
描述: IC VID DECODER NTSC/PAL 32-TQFN
其它有關(guān)文件: Automotive Product Guide
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 2,500
類型: 視頻解碼器
應(yīng)用: 車載系統(tǒng),播放器,電視
電壓 - 電源,模擬: 1.8V
電壓 - 電源,數(shù)字: 1.8V
安裝類型: 表面貼裝
封裝/外殼: 32-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 32-TQFN-EP(5x6)
包裝: 帶卷 (TR)
Detailed Description
The MAX9526 is a simple, low-power video decoder
that converts all modes of NTSC and PAL composite
video signals to 10-bit YCbCr component video com-
patible with the ITU-R BT.656 standard. The device
powers up in fully operational mode and automatically
configures itself to standard NTSC or standard PAL.
An internal 10-bit, 54MHz ADC samples at four times
the sampling rate specified in ITU-R BT.601. The ana-
log front-end of the MAX9526 features a DC restoration
circuit, automatic gain control, and automatic offset cor-
rection. These blocks are controlled with digital pro-
cessing to accurately optimize the full-scale range of
the ADC. An integrated analog anti-aliasing filter elimi-
nates the need for off-chip filtering. The device includes
a 2:1 input multiplexer that can be configured to auto-
matically select the input based on activity.
The system clock is generated with an external 27MHz
crystal and an internal oscillator. Optionally, a 27MHz or
54MHz external clock can be connected to the
XTAL/OSC input. An internal line-locked digital PLL is
used to generate the 54MHz ADC sample clock that is
synchronous to the incoming video signal with up to
±5% variation in horizontal line length. The digital out-
put data and LLC clock are line locked to the video
input and provide a standard ITU output. The PLL can
also be configured to asynchronously sample the input
using the crystal oscillator or external clock.
The MAX9526 provides a 5-line adaptive comb filter to
separate the luminance (Y) and chrominance (C) video
components and reduce cross-chrominance and cross-
luminance artifacts. The MAX9526 operates with any
type of standard composite video signal source includ-
ing DVD players, video cameras, navigation systems,
and VCRs.
The device powers up in fully operational video
decoder mode. An I2C register interface monitors status
and enables programming of many decoder functions
including brightness, contrast, saturation, and hue. The
10-bit output can be reconfigured to provide 8-bit data
with separate horizontal and vertical syncs.
Analog Front-End (AFE)
The MAX9526 AFE implements DC restoration, auto-
matic gain control (AGC), analog anti-aliasing filter
(LPF), activity detection, channel selection, and analog-
to-digital conversion. A block diagram of the AFE is
shown in Figure 1.
Activity Detect and Automatic Channel Selection
The MAX9526 continuously monitors activity at both
video inputs, VIN1 and VIN2. Activity on the selected
channel is detected using the ADC output. On the
unselected channel an analog sync-tip clamp and sync
slicer are used to detect sync amplitudes greater than
50mV. In sleep mode, the analog sync-tip clamps and
sync slicers are used to detect activity on both inputs,
while the rest of the AFE is in a shutdown state.
The output of the activity detect circuit is reported
through the Status register 0x00. The user must manu-
ally select which video input to process by setting
INSEL in register 0x09 appropriately.
The MAX9526 can optionally be configured to automati-
cally select the video input that indicates the presence
of activity by setting AUTOSEL = 1 in register 0x09.
When activity is present on both VIN1 and VIN2 at
power-up or when there is no activity on either input
channel, VIN1 is selected. When there is activity on VIN2
and there is no activity on VIN1, then VIN2 is selected.
When VIN2 is automatically selected with the presence
of activity, the input only switches to VIN1 when activity
goes away on VIN2.
Low-Power, High-Performance
NTSC/PAL Video Decoder
INTERNAL
BIAS
ANALOG
AGC
ANALOG
LPF
DC RESTORATION
DAC
DIGITAL
FILTERING
DIGITAL
CONTROL
ACTIVITY
DETECT
10-BIT
ADC
TO DECODER
10
VIN1
VIN2
VREF
Figure 1. Analog Front-End
MAX9526
10
Maxim Integrated
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