1-to-8 I2C Bus Switches/Multiplexers with Bus Lock-Up De" />
參數(shù)資料
型號(hào)： MAX7358EUG+T
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 6/22頁(yè)
文件大小： 0K
描述： IC MULTIPLEXER 8X1 24TSSOP
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 2,500
功能： 多路復(fù)用器
電路： 1 x 8:1
電壓電源： 單電源
電壓 - 電源，單路/雙路(±)： 2.3 V ~ 5.5 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 24-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 24-TSSOP
包裝： 帶卷 (TR)
MAX7356/MAX7357/MAX7358
1-to-8 I2C Bus Switches/Multiplexers with Bus
Lock-Up Detection, Isolation, and Notification
14
______________________________________________________________________________________
B7
B6
B5
B4
B3
B2
B1
B0
COMMAND
X
XXXX
X
0
Interrupt with
RST/INT disabled
X
XXXX
X
1
Interrupt with
RST/INT enabled
X
XXXX0
X
Flush-out disabled
X
XXXX1
X
Flush-out enabled
X
XXX
0
X
RST/INT released after a register read
X
XXX
1
X
RST/INT released after 1.6 seconds
XX
X
0
X
XX
The lock-up register shows the current
condition
XX
X
1
X
XX
The lock-up register data is not cleared
until a read
X
0
X
Disconnect all channels on bus lock-up
X
1
X
Disconnect only the locked up bus
X
0
X
Bus lock-up detection enabled
X
1
X
Bus lock-up detection disabled
X
0
XXXX
X
Enhanced mode
X
1
XXXX
X
Basic mode enabled
0
X
XXXX
X
Preconnect test is disabled
1
X
XXXX
X
Preconnect test is enabled
Table 5. Configuration Register Definition
X = Don’t care.
be selected. More than one channel can be selected
simultaneously. When a channel is selected, the channel
becomes active immediately after a stop condition has
been placed on the I2C bus. This ensures that all
SC_/SD_ lines are in a HIGH state when the channel is
made active, so that no false conditions are generated at
the time of connection.
Configuration Register
(MAX7357/MAX7358)
B0 =
RST/INT serves as an interrupt when a bus lock-
up condition is detected.
B1 = Flush-out sequence is sent automatically on locked-
up channels when a lock-up condition is detected.
B2 = When B0 = 1, release the
RST/INT output after
asserting for 1.6 seconds.
B3 = Data in the lock-up indication register cleared only
after reading the register.
B4 = Connected channels remain connected on detec-
tion of lock-up if the lock-up condition is present only on
a channel that is not connected.
B5 = Disable bus lock-up detection.
B6 = Basic mode.
B7 = Enables the preconnection wiggle test for SC_
and SD_.
Flush-Out Sequence Register
(MAX7357/MAX7358)
A flush-out sequence can be sent to a particular auxil-
iary bus automatically after the identification of the lock-
up condition. The flush-out sequence consists of 18
SC_ clock cycles. An 8-bit sequence for the SD_ to fol-
low during the flush-out cycle can also be defined by
writing to the flush-out sequence register. By default,
the flush-out sequence register is all ones. The
MAX7357 or MAX7358 attempt to send the one-byte
sequence followed by an additional clock cycle (NACK)
two times sequentially, followed by a stop condition.
The effectiveness of sending the flush-out sequence
depends on the behavior of the locked-up device. For
an auxiliary bus with only slave devices, it is more likely
that the SCL line can still be driven by the MAX7357 or
MAX7358. In this case, a slave device may respond to
a particular flush-out sequence. After the release of the
SD_ line by a “stuck” device, the remaining sequence
on the SD_ line can be used to reset itself.
Bus Lock-Up Indication Register
(MAX7357/MAX7358)
The bus master can read the lock-up indication byte to
identify the stuck channels. A bit set to ”1” indicates
that the associated channel is stuck. The indication for
a given channel remains as long as the lock-up condi-
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