1-to-8 I2C Bus Switches/Multiplexers with Bus Lock-Up De" />
參數(shù)資料
型號(hào): MAX7358EUG+T
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 5/22頁(yè)
文件大小: 0K
描述: IC MULTIPLEXER 8X1 24TSSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
功能: 多路復(fù)用器
電路: 1 x 8:1
電壓電源: 單電源
電壓 - 電源,單路/雙路(±): 2.3 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 24-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 24-TSSOP
包裝: 帶卷 (TR)
MAX7356/MAX7357/MAX7358
1-to-8 I2C Bus Switches/Multiplexers with Bus
Lock-Up Detection, Isolation, and Notification
______________________________________________________________________________________
13
Only the switch control register can be accessed through
an I2C write or read command. All data bytes are for
the switch control register. The last data byte in an I2C
write command is retained by the switch control register.
Register Access Protocol
(MAX7357/MAX7358)
Only the MAX7357 or MAX7358 I2C device address is
required to gain access to its registers. A typical I2C
command to communicate with the MAX7357 or
MAX7358 starts with its device address and is followed
directly by data bytes. Internal register addresses are
not used in an I2C write or read command.
For enhanced mode, all registers are accessed in
sequence starting with the switch control register and
follows the order defined by internal register addresses
as shown in Table 2. Internal register addresses are
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, and 0x06 for
switch control, configuration, flush-out sequence, lock-
up indication, first and second bytes of the traffic prior
to lock-up, and preconnection fault registers, respec-
tively. When writing data to the register(s), addressing
starts with address 0x00 and goes one higher in each
subsequent byte and comes back to 0x00 again after
0x02 since the next four higher addressed registers are
read only. Read access also starts with the internal reg-
ister address 0x00 and goes one higher in each subse-
quent byte and comes back to 0x00 again after 0x06.
For basic mode, only the switch control register can be
accessed through an I2C write or read command. All
data bytes are for the switch control register. The last
data byte in an I2C write command is retained by the
switch control register. Incomplete bytes are ignored.
Switch Control Register
The switch control register (Figure 8) selects which
channels will be connected to the main I2C bus. This
register can be written and read through the main I2C
bus. The POR value for the switch control register is
0x00—all switches disconnected.
A SC_/SD_ downstream pair, or channel, is selected by
the contents of the switch control register. All bits of the
control byte are used to determine which channel is to
B6
B0
B7
B5
B4
B3
B2
B1
CHANNEL SELECTION BITS (READ/WRITE)
CHANNEL 0
CHANNEL 1
CHANNEL 2
CHANNEL 3
CHANNEL 4
CHANNEL 5
CHANNEL 6
CHANNEL 7
Figure 8. Switch Control Register
B7
B6
B5
B4
B3
B2
B1
B0
COMMAND
X
XXXX
0
Channel 0 disabled
X
XXXX
1
Channel 0 enabled
X
0
X
Channel 1 disabled
X
1
X
Channel 1 enabled
X
0
X
Channel 2 disabled
X
1
X
Channel 2 enabled
X
0
X
Channel 3 disabled
X
1
X
Channel 3 enabled
X
0
X
Channel 4 disabled
X
1
X
Channel 4 enabled
X
0
XXXX
X
Channel 5 disabled
X
1
XXXX
X
Channel 5 enabled
X
0
X
XXXX
X
Channel 6 disabled
X
1
X
XXXX
X
Channel 6 enabled
0
X
XXXX
X
Channel 7 disabled
1
X
XXXX
X
Channel 7 enabled
Table 4. Switch Control Register Channel Selection
X = Don’t care.
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