參數(shù)資料
型號(hào)： MAX6853AEE
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類(lèi)： 顯示驅(qū)動(dòng)器
英文描述： 2-Wire Interfaced, 5 x 7 Matrix Vacuum-Fluorescent Display Controller
中文描述： VACUUM FLUOR DISPLAY DRIVER, PDSO16
封裝： 0.150 INCH, 0.25 MM PITCH, MO-137, QSOP-16
文件頁(yè)數(shù)： 8/35頁(yè)
文件大?。?/td> 489K
代理商： MAX6853AEE
MAX6853
2-Wire Interfaced, 5
7 Matrix Vacuum-
Fluorescent Display Controller
16
______________________________________________________________________________________
1 has set up the MAX6853's address pointer but before
master 1 has read the data. If master 2 subsequently
changes the MAX6853's address pointer, then master
1's delayed read may be from an unexpected location.
Command Address Autoincrementing
Address autoincrementing allows the MAX6853 to be
configured with the shortest number of transmissions
by minimizing the number of times the command byte
needs to be sent. The command address or the font
pointer address stored in the MAX6853 generally incre-
ments after each data byte is written or read (Table 8).
VFD Driver Serial Interface
The VFD driver interface on the MAX6853 is a serial
interface using three outputs, VFLOAD, VFCLK, and
VFDOUT (Figure 14) to drive industry-standard, shift-
register, high-voltage grid/anode VFD tube drivers
(Figures 3 and 4). The speed of VFCLK is 2MHz when
OSC is 4MHz. The maximum speed of VFCLK is 4MHz
when OSC is 8MHz. This interface transfers display
data from the MAX6853 to the VFD tube driver. The ser-
ial interface bit stream output is programmable up to
122 bits, which are labeled DD0–DD121.
The functions of the three interface outputs are as fol-
lows: VFCLK is the serial clock output, which shifts data
on its falling edge from the MAX6853’s 122-bit output
shift register to VFLOAD.
VFDOUT is the serial data output. The data changes on
VFCLK’s falling edge, and is stable when it is sampled
by the display driver on the rising edge of VFCLK.
VFLOAD is the latch-load output. VFLOAD is high to
transfer data from the display tube driver’s shift register to
the display driver’s output latch (transparent mode), and
low to retain that data in the display driver’s output latch.
A fourth output, VFBLANK, provides gating control of
the tube driver. VFBLANK can be configured to be
either high or low using the VBLANK polarity register
(Table 27) to enable the VFD tube driver. In the default
condition, VFBLANK is high to disable the VFD tube dri-
ver, which is expected to force its driver outputs low to
blank the display without altering the contents of its out-
put latches. In the default condition, VFBLANK is low to
enable its VFD tube driver outputs to follow the state of
the VFD tube driver’s output latches. The VFBLANK
output is used for PWM intensity control and to disable
the VFD tube driver in shutdown.
Multiplex Architecture
The multiplex engine transmits grid and anode control
data to the external VFD driver using the VFCLK, VFD-
OUT, and VFLOAD. The number of data bits m trans-
mitted is set by the user in the shift-limit register (Table
29). Figure 15 is the VFD multiplex timing diagram.
The essential rules for multiplex action are as follows:
The external VFD driver’s data latch contains the
data for the current grid being displayed.
The VFBLANK input is controlled to provide the
PWM intensity control.
The VFCLK and VFDOUT outputs are used to fill the
external VFD driver’s shift register with the multiplex
data for the next grid, during the multiplex timeslot
for the current grid.
The VFLOAD output loads the new grid-anode data
pattern at the start of its multiplex cycle.
Grids Register
The grids register sets how many grids are multiplexed
from 1 to 48 (Table 25).
When the grids register is written, the external VFD tube
driver is presumed to contain invalid data. The
VFBLANK output disables the VFD tube driver for the
first multiplex cycle after exiting shutdown, clearing any
invalid data. The next multiplex cycle uses newly sent
valid data. If the grids register is written with an out-of-
range value of 0x30 to 0xFF, then the value 0x2F is
stored instead.
COMMAND BYTE
ADDRESS RANGE
AUTOINCREMENT BEHAVIOR
x0000000 to x0000100
Command byte address autoincrements after byte read or written.
x0000110
Command byte address remains at x0000110 after byte read or written, but the font
output map address pointer autoincrements.
x0010000
Factory reserved; do not write to this register.
x000111 to x1111110
Command byte address autoincrements after byte read or written.
x1111111
Command byte address remains at x1111111 after byte read or written.
Table 8. Command Address Autoincrement Rules
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參數(shù)描述
MAX6853AEE+T 功能描述:VFD驅(qū)動(dòng)器 RoHS:否 制造商:Maxim Integrated 工作電源電壓:8 V to 76 V, 3 V to 5.5 V 電源電流:0.9 mA, 700 uA 最大工作溫度:+ 125 C 封裝 / 箱體:SOIC-20 封裝:Tube
MAX6853AEE-T 功能描述:VFD驅(qū)動(dòng)器 RoHS:否 制造商:Maxim Integrated 工作電源電壓:8 V to 76 V, 3 V to 5.5 V 電源電流:0.9 mA, 700 uA 最大工作溫度:+ 125 C 封裝 / 箱體:SOIC-20 封裝:Tube
MAX6854UK16D1+T 功能描述:監(jiān)控電路 Single nPower Supervisor RoHS:否 制造商:STMicroelectronics 監(jiān)測(cè)電壓數(shù): 監(jiān)測(cè)電壓: 欠電壓閾值: 過(guò)電壓閾值: 輸出類(lèi)型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開(kāi)關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel
MAX6854UK16D1-T 功能描述:監(jiān)控電路 RoHS:否 制造商:STMicroelectronics 監(jiān)測(cè)電壓數(shù): 監(jiān)測(cè)電壓: 欠電壓閾值: 過(guò)電壓閾值: 輸出類(lèi)型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開(kāi)關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel
MAX6854UK16D2+T 功能描述:監(jiān)控電路 Single nPower Supervisor RoHS:否 制造商:STMicroelectronics 監(jiān)測(cè)電壓數(shù): 監(jiān)測(cè)電壓: 欠電壓閾值: 過(guò)電壓閾值: 輸出類(lèi)型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開(kāi)關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel
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