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參數(shù)資料
| 型號(hào)： | MAX6621AUB+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 8/18頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TRANSLATOR PECI-I2C 10-MSOP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 邏輯功能： | 變換器 |
| 位數(shù)： | 1 |
| 輸入類型： | PECL |
| 輸出類型： | I²C? |
| 通道數(shù)： | 1 |
| 輸出/通道數(shù)目： | 1 |
| 差分 - 輸入:輸出： | 無/無 |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | -20°C ~ 120°C |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 10-µMAX |
| 包裝： | 帶卷 (TR) |
MAX6621
Message Format for Writing to the MAX6621
A write to the MAX6621 consists of the transmission of
the MAX6621’s slave address with the R/W bit set to
zero, followed by at least 1 byte of information. The first
byte of information is the command byte. The command
byte determines which register of the MAX6621 is to be
written to by the next byte or read from during the next
read transmission. If a STOP condition is detected after
the command byte is received, the MAX6621 takes no
further action beyond setting the register address.
The bytes received after the command byte are data
bytes. The data bytes go into the register of the
MAX6621 specified by the command byte. Only the last
data byte or word transmitted before a STOP condition
is stored by the device (Figure 10).
Message Format for Reading the MAX6621
The MAX6621 is read using the MAX6621’s internally
stored command byte as an address pointer the same
way the stored command byte is used as an address
pointer for a write. The pointer autoincrements after
each data byte is read. Thus, a read is initiated by first
configuring the MAX6621’s command byte by perform-
ing a write. The master can now read N consecutive
bytes from the MAX6621 with the first data byte being
read from the register addressed by the initialized com-
mand byte (Figure 10).
Packet Error Checksum (PEC)
All MAX6621 I2C packets have an optional packet error
checksum (PEC). The PEC is implemented in accor-
dance with the SMBus specification, versions 1.1 and
2. The MAX6621 accepts commands with or without
PEC. The PEC for device responses is optional and can
be disabled in the CONFIG0 register.
Applications Information
Operation with Multiple Masters
If the MAX6621 is operated on a 2-wire interface with
multiple masters, a master reading the MAX6621 should
use a repeated START between the write that sets the
MAX6621’s address pointer, and the read(s) that takes
the data from the location(s) (Table 19). This is because
it is possible for master 2 to take over the bus after mas-
ter 1 has set up the MAX6621’s address pointer, but
before master 1 has read the data. If master 2 subse-
quently changes the MAX6621’s address pointer, master
1’s delayed read can be from an unexpected location.
The use of multiple masters is not recommended.
Choosing Pullup Resistors
I2C requires pullup resistors to provide a logic-high
level to data and clock lines. There are tradeoffs
between power dissipation and speed, and a compro-
mise must be made in choosing pullup resistor values.
Every device connected to the bus introduces some
capacitance even when the device is not in operation.
I2C specifies a minimum 300ns rise time to go from low
to high (30% to 70%) for fast mode, which is defined for
a date rate of 400kbps (refer to the I2C specifications
for details). To meet the rise time requirement, choose
pullup resistors so that the rise time tR = 0.85RPULLUP
x CBUS < 300ns. For typical low bus capacitances, a
4.7k
Ω resistor can be used. For a bus capacitance of
400pF, choose a pullup resistor less than 880
Ω. Many
I2C devices work when the minimum specified rise time
is not met. However, if the time it takes for the waveform
to rise becomes too slow, these waveforms are not rec-
ognized by the master.
PECI-to-I2C Translator
16
______________________________________________________________________________________
A6:A1
A0
(SET BY AD0 PIN)
SLAVE
ADDRESS
I2C ADDRESS BYTE
INCLUDING R/W BIT
010101
0
2Ah
54h, 55h
010101
1
2Bh
56h, 57h
Table 19. MAX6621 Slave Addresses
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