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參數(shù)資料
| 型號： | MAX6621AUB+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 17/18頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC TRANSLATOR PECI-I2C 10-MSOP |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 2,500 |
| 邏輯功能： | 變換器 |
| 位數(shù)： | 1 |
| 輸入類型： | PECL |
| 輸出類型： | I²C? |
| 通道數(shù)： | 1 |
| 輸出/通道數(shù)目： | 1 |
| 差分 - 輸入:輸出： | 無/無 |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | -20°C ~ 120°C |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 10-µMAX |
| 包裝： | 帶卷 (TR) |
MAX6621
PECI-to-I2C Translator
8
_______________________________________________________________________________________
CONFIG2
The CONFIG2 register holds the offset that is added to
all temperature return values that are not error codes.
The offset is enabled in CONFIG0, bit 6; +95°C is set
as 17C0h or 005Fh, depending on the data format. To
represent +95°C in 16-bit representation, convert
+95°C to binary using two’s complement and left-shift
six times. The MAX6621 automatically converts the off-
set value to the equivalent value when the data format
is changed. See Table 5 for the default offset and Table
6 for some example values.
When configured in CONFIG2, and the return code is not
an error code (see the
Error Codes section), the device
adds the offset value stored in CONFIG2 to the return
value. For example, if the CPU’s thermal control circuit
activation point is at +95°C, CONFIG2 can be set to
+95°C (005Fh or 17C0h) and all return values are con-
verted to absolute temperatures. Note that the thermal
control circuit activation point is CPU specific. The offset
value is represented in the current data format.
CONFIG3
CONFIG3 register configures the temperature averaging
function. See the
Temperature Averaging section for
more information. Table 7 shows the default settings.
Temperature Representation
Temperature data is formatted in 16-bit two’s comple-
ment representing a range from -512°C to +512°C in
steps of 1/64°C (Figure 1). Internally, the device always
uses the 16-bit data format. The temperature is given in
two’s complement and left-shifted so that the +1°C bit
is bit 6 (Figure 2). Temperatures can be represented
externally in alternate data format if fractional readings
are not needed. Table 8 shows some examples.
BIT(S)
DESCRIPTION
DEFAULT
15:0
Temperature offset
0000h
Table 5. CONFIG2 Register
BINARY
TEMP (°C)
HEX
RESHI
RESLO
0
0000h
0000 0000
+25
0640h
0000 0110
0100 0000
+50
0C80h
0000 1100
1000 0000
+75
12C0h
0001 0010
1100 0000
+95
17C0h
0001 0111
1100 0000
Table 6. Example Offset Values in 16-Bit
Temperature Representation
BIT(S)
DESCRIPTION
DEFAULT
15:8
Reserved, set to 0
00h
7:0
Averaging shift count, see formula
00h
Table 7. CONFIG3 Register
RESLO
1
°C
1
4
1
2
°C
1
8
1
32
1
16
1
64
0
1
2
3
4
5
6
7
Figure 1. Temperature Measured in 1/64°C Steps
-50
°C
0
1
10
1
TWO'S
COMPLEMENT
RESLO
RESHI
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Figure 2. Conversion of Temperature Done in Two’s
Complement
BINARY
TEMP
(°C)
RELATIVE
TEMP (°C)
HEX
RESHI
RESLO
+94
-1
FFC0h
1111 1111
1100 0000
+85
-10
FD80h
1111 1101
1000 0000
+70
-25
FDC0h
1111 1101
1100 0000
+45
-50
F380h
1111 0011
1000 0000
+20
-75
ED30h
1110 1101
0100 0000
Table 8. Example 16-Bit Representation
with No Offset (Activation Point = +95°C)
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