參數(shù)資料
型號: MAX5965AEAX+
廠商: Maxim Integrated
文件頁數(shù): 21/54頁
文件大小: 1334K
描述: IC PSE CTRLR FOR POE 36SSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 30
類型: 以太網(wǎng)供電控制器(PoE)
應(yīng)用: IP 電話,LAN 網(wǎng)絡(luò)供電,網(wǎng)絡(luò)路由器和交換機(jī)
內(nèi)部開關(guān):
電源電壓: 2.4 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 36-BSOP(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 36-SSOP
包裝: 管件
High-Power, Quad, Monolithic, PSE Controllers
for Power over Ethernet
______________________________________________________________________________________   21
Overcurrent Protection
A sense resistor R
S
connected between SENSE_ and
V
EE
monitors the load current. Under normal operating
conditions, the voltage across R
S
(V
RS
) never exceeds
the threshold V
SU_LIM
. If V
RS
exceeds V
SU_LIM
, an
internal current-limiting circuit regulates the GATE_ volt-
age, limiting the current to I
LIM
= V
SU_LIM
/R
S
. During
transient conditions, if V
RS
exceeds V
SU_LIM
by more
than 1V, a fast pulldown circuit activates to quickly
recover from the current overshoot. During startup, if
the current-limit condition persists, when the startup
timer, t
START
, times out, the port shuts off, and the
STRT_FLT_ bit is set. In the normal powered state, the
MAX5965A/MAX5965B check for overcurrent condi-
tions as determined by V
FLT_LIM
= ~88% of V
SU_LIM
.
The t
FAULT
counter sets the maximum allowed continu-
ous overcurrent period. The t
FAULT
counter increases
when V
RS
exceeds V
FLT_LIM
and decreases at a slower
pace when V
RS
drops below V
FLT_LIM
. A slower decre-
ment for the t
FAULT
counter allows for detecting repeat-
ed short-duration overcurrents. When the counter
reaches the t
FAULT
limit, the MAX5965A/MAX5965B
power off the port and assert the IMAX_FLT_ bit. For a
continuous overstress, a fault latches exactly after a
period of t
FAULT
. V
SU_LIM
is programmable through the
ICUT registers R2Ah[6:4], R2Ah[2:0], R2Bh[6:4],
R2Bh[2:0], and the IVEE bits in register R29h[1:0]. See
the High-Power Mode section for more information on
the ICUT register.
After power-off due to an overcurrent fault, and if the
RSTR_EN bit is set, the t
FAULT
timer is not immediately
reset but starts decrementing at the same slower pace.
The MAX5965A/MAX5965B allow the port to be pow-
ered on only when the t
FAULT
counter is at zero. This
feature sets an automatic duty-cycle protection to the
external MOSFET avoiding overheating.
The MAX5965A/MAX5965B continuously flag when the
current exceeds the maximum current allowed for the
class as indicated in the CLASS status register. When
class overcurrent occurs, the MAX5965A/MAX5965B
set the IVC_ bit in register R09h.
ICUT Register and High-Power Mode
ICUT Register
The ICUT register determines the maximum current lim-
its allowed for each port of the MAX5965A/MAX5965B.
The 3 ICUT bits (R2Ah[6:4], R2Ah[2:0], R2Bh[6:4], and
R2Bh[2:0]) allow programming of the current-limit and
overcurrent thresholds in excess of the IEEE standard
limit (see Tables 34a, 34b, and 34c). The ICUT regis-
ters can be written to directly through the I
2
C interface
when CL_DISC (R17h[2]) is set to 0 (see Table 3). In
this case, the current limit of the port is configured
regardless of the status of the classification.
By setting the CL_DISC bit to 1, the MAX5965A/
MAX5965B automatically set the ICUT register based
upon the classification result of the port. See Table 3
and the Register Map and Description section.
High-Power Mode
When CL_DISC (R17h[2]) is set to 0, high-power mode
is configured by setting the ICUT bits to any combina-
tion other than 000, 110, or 111 (note that 000 is the
default value for the IEEE standard limit). See Table 3
and the Register Map and Description section.
Foldback Current
During startup and normal operation, an internal circuit
senses the voltage at OUT_ and reduces the current-
limit value when (V
OUT
_ - V
EE
) > 28V. The foldback
function helps to reduce the power dissipation on the
FET. The current limit eventually reduces down to 1/3 of
I
LIM
when (V
OUT
_ - V
EE
) > 48V (see Figure 3a). For
high-power mode, the foldback starts when (V
OUT
_ -
V
EE
) > 10V (see Figure 3b). In high-power mode, the
current limit (I
LIM
) is reduced down to minimum fold-
back current (V
TH_FB
/R
S
) when (V
OUT
_ - V
EE
) > 48V.
Figure 2. PGOOD_ Timing
PGOOD_
POK_
t
PGOOD
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