參數(shù)資料
型號: MAX5949BESA+T
廠商: Maxim Integrated
文件頁數(shù): 14/18頁
文件大?。?/td> 186K
描述: IC CNTRLR HOT SWAP 8-SOIC
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 2,500
類型: 熱交換控制器
應用: 通用
內(nèi)部開關:
電源電壓: -20 V ~ -80 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應商設備封裝: 8-SOIC
包裝: 帶卷 (TR)
When the DRAIN voltage of the MAX5949A is high with
respect to V
EE
or the GATE voltage is low, the internal
pulldown MOSFET Q2 is off and the PWRGD pin is in a
high-impedance state (Figure 14). The PWRGD pin is
pulled high by the modules internal pullup current
source, turning the module off. When the DRAIN volt-
age drops below V
DL
and the GATE voltage is greater
than V
GATE
- V
GH
, Q2 turns on and the PWRGD pin
pulls low, enabling the module.
The PWRGD signal can also be used to turn on an LED
or optoisolator to indicate that the power is good
(Figure 15) (see the Component Selection Procedure
section).
When the DRAIN voltage of the MAX5949B is high with
respect to V
EE
(Figure 13) or the GATE voltage is low, the
internal MOSFET Q3 is turned off so that I1 and the inter-
nal MOSFET Q2 clamp the PWRGD pin to the DRAIN pin.
MOSFET Q2 sinks the modules pullup current, and the
module turns off.
When the DRAIN voltage drops below V
DL
and the
GATE voltage is greater than V
GATE
- V
GH
, MOSFET
Q3 turns on, shorting I1 to V
EE
and turning Q2 off. The
pullup current in the module pulls the PWRGD pin high,
enabling the module.
GATE Pin Voltage Regulation
The GATE pin goes high when the following startup con-
ditions are met: the UV pin is high, the OV pin is low, the
supply voltage is above V
UVLOH
, and (V
SENSE
- V
EE
) is
less than 50mV. The gate is pulled up with a 45礎 current
source and is regulated at 13.5V above V
EE
. The
MAX5949A/MAX5949B include an internal clamp that
ensures the GATE voltage of the external MOSFET never
exceeds 18V. During a fast-rising V
DD
, the clamp also
keeps the GATE and SENSE potentials as close as possi-
ble to prevent the FET from accidentally turning on. When
a fault condition is detected, the GATE pin is pulled low
with a 50mA current.
Applications Information
Sense Resistor
The circuit-breaker current-limit threshold is set to 50mV
(typically). Select a sense resistor that causes a drop
equal to or above the current-limit threshold at a current
level above the maximum normal operating current.
Typically, set the overload current to 1.5 to 2.0 times the
nominal load current plus the load-capacitance charging
current during startup. Choose the sense-resistor power
rating to be greater than (V
CL
)
2
/ R
SENSE
.
-48V Hot-Swap Controllers
with External R
SENSE
14   ______________________________________________________________________________________
V
EE
SENSE
GATE
DRAIN
V
DD
OV
UV
PWRGD
MAX5949A
-48V RTN
-48V
R4
549k&
1%
R5
6.49k&
1%
R6
10k&
1%
R1
0.02&
5%
R3
1k&
5%
R2
10&
5%
C1**
470nF
25V
Q1
IRF530
C2
15nF
100V
*
-48V RTN
(SHORT PIN)
C3
100礔
100V
*DIODES INC. SMAT70A.
**OPTIONAL.
PWRGD
MOC207
R7**
51k&
5%
Figure 15. Using PWRGD to Drive an Optoisolator
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