參數(shù)資料
型號： MAX5885EGM+TD
廠商： Maxim Integrated Products
文件頁數(shù)： 13/18頁
文件大?。?/td> 0K
描述： IC DAC 16BIT 3.3V 200MSPS 48-QFN
產(chǎn)品培訓模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝： 2,500
設(shè)置時間： 11ns
位數(shù)： 16
數(shù)據(jù)接口： 并聯(lián)
轉(zhuǎn)換器數(shù)目： 1
電壓電源： 模擬和數(shù)字
功率耗散（最大）： 135mW
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 48-QFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 48-QFN-EP（7x7）
包裝： 帶卷 (TR)
輸出數(shù)目和類型： 2 電流，單極
采樣率（每秒）： 200M
MAX5885
3.3V, 16-Bit, 200Msps High Dynamic
Performance DAC with CMOS Inputs
4
_______________________________________________________________________________________
Note 1: Nominal full-scale current IOUT = 32 IREF.
Note 2: This parameter does not include update-rate depending effects of sin(x)/x filtering inherent in the MAX5885.
Note 3: Parameter measured single ended into a 50
termination resistor.
Note 4: Parameter guaranteed by design.
Note 5: Parameter defined as the change in midscale output caused by a ±5% variation in the nominal supply voltage.
ELECTRICAL CHARACTERISTICS (continued)
(AVDD = DVDD = VCLK = 3.3V, AGND = DGND = CLKGND = 0V, external reference, VREFIO = 1.25V, RL = 50
, IOUT = 20mA,
fCLK = 200Msps, TA = TMIN to TMAX, unless otherwise noted.
≥+25°C guaranteed by production test, <+25°C guaranteed by design
and characterization. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Data Latency
3.5
Clock
cycles
Minimum Clock Pulse Width High
tCH
CLKP, CLKN
1.5
ns
Minimum Clock Pulse Width Low
tCL
CLKP, CLKN
1.5
ns
CMOS LOGIC INPUTS (B0–B15, PD, SEL0, XOR)
Input Logic High
VIH
0.7 x
DVDD
V
Input Logic Low
VIL
0.3 x
DVDD
V
Input Leakage Current
IIN
-15
+15
A
Input Capacitance
CIN
5pF
CLOCK INPUTS (CLKP, CLKN)
Sine wave
≥1.5
Differential Input Voltage Swing
VCLK
Square wave
≥0.5
VP-P
Differential Input Slew Rate
SRCLK
(Note 5)
>100
V/s
Common-Mode Voltage Range
VCOM
1.5
±20%
V
Input Resistance
RCLK
5k
Input Capacitance
CCLK
5pF
POWER SUPPLIES
Analog Supply Voltage Range
AVDD
3.135
3.3
3.465
V
Digital Supply Voltage Range
DVDD
3.135
3.3
3.465
V
Clock Supply Voltage Range
VCLK
3.135
3.3
3.465
V
fCLK = 100Msps, fOUT = 1MHz
27
Analog Supply Current
IAVDD
Power-down
0.3
mA
fCLK = 100Msps, fOUT = 1MHz
8.5
mA
Digital Supply Current
IDVDD
Power-down
10
A
fCLK = 100Msps, fOUT = 1MHz
5.5
mA
Clock Supply Current
IVCLK
Power-down
10
A
fCLK = 100Msps, fOUT = 1MHz
135
Power Dissipation
PDISS
Power-down
1
mW
Power-Supply Rejection Ratio
PSRR
AVDD = VCLK = DVDD = 3.3V
±5% (Note 5)
-0.1
+0.1
%FS/V
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MAX5886EGK+TD 功能描述:數(shù)模轉(zhuǎn)換器- DAC 12-Bit 500Msps DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
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