參數(shù)資料
型號(hào)： MAX536
廠商： Maxim Integrated Products, Inc.
英文描述： Calibrated, Quad, 12-Bit Voltage-Output DACs with Serial Interface
中文描述： 校準(zhǔn)型、四路、12位、電壓輸出DAC，串行接口
文件頁(yè)數(shù)： 5/24頁(yè)
文件大?。?/td> 361K
代理商： MAX536
M
Calibrated, Quad, 12-Bit
Voltage-Output DACs with S erial Interfac e
_______________________________________________________________________________________
5
ELECTRICAL CHARACTERISTICS—MAX537
(V
DD
= +5V, V
SS
= -5V, REFAB/REFCD = 2.5V, AGND = DGND = 0V, R
L
= 5k
, C
L
= 100pF, T
A
= T
MIN
to T
MAX
, unless
otherwise noted. Typical values are at T
A
= +25°C.)
PARAMETER
STATIC PERFORMANCE—ANALOG SECTION
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Resolution
N
12
Bits
Integral Nonlinearity
INL
MAX537A
MAX537B
Guaranteed monotonic
±0.15
±0.50
±1
±1
±3.0
±6.0
±6.0
±9.0
±7.0
±11.0
±9.0
±15.0
±1.5
±3.0
LSB
Differential Nonlinearity
DNL
LSB
MAX537A
MAX537B
MAX537AC
MAX537BC
MAX537AE
MAX537BE
MAX537AM
MAX537BM
Gain Error
R
L
=
∞
R
L
= 5k
-0.3
-0.8
LSB
PSRR
T
A
= +25°C, 4.5V
≤
V
DD
≤
5.5V
±0.01
±0.5
LSB/V
PSRR
T
A
= +25°C, -5.5V
≤
V
SS
≤
-4.5V
±0.02
±0.7
LSB/V
Gain Error
±0.1
±0.3
±0.3
±1.25
±3.0
±6.0
LSB
Integral Nonlinearity
REFERENCE INPUT
INL
±0.35
±1.0
LSB
Reference Input Range
Reference Input Resistance
MULTIPLYING-MODE PERFORMANCE
REF
RREF
0.0
5
V
DD
- 2.2
V
Offset Error
T
A
= T
MIN
to T
MAX
mV
V
DD
Power-Supply
Rejection Ratio
V
SS
Power-Supply
Rejection Ratio
MATCHING PERFORMANCE
(T
A
= +25°C)
Offset Error
MAX537A
MAX537B
mV
Code dependent, minimum at code 555 hex
k
Reference 3dB Bandwidth
V
REF
= 2V
p-p
700
kHz
Reference Feedthrough
Input code = all 0s
-100
dB
V
REF
= 10V
p-p
at 4kHz
-82
THD + N
V
REF
= 850mV
p-p
at 100kHz
0.024
%
Input High Voltage
Input Low Voltage
Input Leakage Current
Input Capacitance (Note 2)
V
IH
V
IL
2.4
V
V
0.8
1.0
10
V
IN
= 0V or V
DD
μ
A
pF
V
REF
= 10V
p-p
at 400Hz
Total Harmonic Distortion
Plus Noise
DIGITAL INPUTS
(SDI, SCK,
CS
,
LDAC
)
T
A
= +25°C
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