參數(shù)資料
型號: MAX14502AETL+
廠商: Maxim Integrated Products
文件頁數(shù): 22/41頁
文件大?。?/td> 0K
描述: IC CARD READER USB-SD 40-TQFN
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 60
應(yīng)用: USB
接口: I²C,2 線串口
電源電壓: 1.8 V ~ 3.3 V
封裝/外殼: 40-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 40-TQFN-EP(5x5)
包裝: 管件
安裝類型: 表面貼裝
MAX14500–MAX14503
Hi-Speed USB-to-SD Card
Readers with Bypass
______________________________________________________________________________________
29
Format for Writing
A write to the MAX14500–MAX14503 comprises the
transmission of the slave address with the R/W bit set to
zero, followed by at least 1 byte of information. The first
byte of information is the register address or command
byte. The register address determines which register of
the MAX14500–MAX14503 is to be written by the next
byte if received. If a STOP condition is detected after
the register address is received, then the MAX14500–
MAX14503 take no further action beyond storing the
register address (Figure 17).
Any bytes received after the register address are data
bytes. The first data byte goes into the register selected
by the register address and subsequent data bytes go
into subsequent registers (Figure 18). If multiple data
bytes are transmitted before a STOP condition, these
bytes are stored in subsequent registers because the
register address autoincrements.
Format for Reading
The MAX14500–MAX14503 are read using the internal-
ly stored register address as an address pointer, the
same way the stored register address is used as an
address pointer for a write. The pointer autoincrements
after each data byte is read using the same rules used
for a write. Thus, a read is initiated by first configuring
the register address by performing a write (Figure 19).
The master can now read consecutive bytes from the
MAX14500–MAX14503, with the first data byte being
read from the register addressed pointed by the previ-
ously written register address (Figure 20). Once the
master sends a NACK, the MAX14500–MAX14503 stop
sending valid data.
Applications Information
SD Ports
The MAX14500–MAX14503 support one or two SD
cards or SD interface NAND flash memory.
SD Ports Configuration
There are three operational configurations:
40-pin TQFN version, containing one host port and
one SD card (Figures 1, 2)
56-bump WLP version, containing two SD host ports
and two SD cards. There are two SD hosts and two
SD memory cards. Use this mode if the host has two
SD ports (Figure 3).
1110
0
ADDRESS = 0xE0
REGISTER 0x01 WRITE DATA
S
D7
D6
D5
D4
D2
D1
D3
0 = WRITE
0000
001
0
REGISTER ADDRESS = 0x01
0A
A
P
D0
A/A
S = START BIT
P = STOP BIT
A = ACK
A = NACK
D_ = DATA BIT
Figure 17. Format for I2C Write. In this example the register 0x01 is written.
1110
00
0
ADDRESS = 0xE0
REGISTER 0x01 WRITE DATA
S
D7
D6
D5
D4
D2
D1
D3
0 = WRITE
0000
001
0
REGISTER ADDRESS = 0x01
0A
A
D0
A
REGISTER 0x02 WRITE DATA
D7
D6
D5
D4
D2
D1
D3
P
D0
A/A
Figure 18. Format for Writing to Multiple Registers. In this example, registers 0x01 and 0x02 are written in sequence.
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