參數(shù)資料
型號： MAX14502AETL+
廠商： Maxim Integrated Products
文件頁數(shù)： 12/41頁
文件大?。?/td> 0K
描述： IC CARD READER USB-SD 40-TQFN
產(chǎn)品培訓模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝： 60
應用： USB
接口： I²C，2 線串口
電源電壓： 1.8 V ~ 3.3 V
封裝/外殼： 40-WFQFN 裸露焊盤
供應商設備封裝： 40-TQFN-EP（5x5）
包裝： 管件
安裝類型： 表面貼裝
MAX14500–MAX14503
Hi-Speed USB-to-SD Card
Readers with Bypass
2
_______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS
(VCC = +2.4V to +3.6V, VSD = +2.4V to +3.6V, VIO = +1.5V to +3.6V, VTM = +2.91V to +3.4V, TA = -40°C to +85°C, unless otherwise
noted. Typical values are at VCC = +3.3V, VIO = +2.5V, VSD = +2.5V, VTM = +3.3V, TA = +25°C.) (Note 2)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DC CHARACTERISTICS
Pass thru
2.1
3.6
Card reader active, fCCLK_
≤ 26MHz
2.1
3.6
VCC Supply Voltage
VCC
Card reader active, fCCLK_ > 26MHz
2.4
3.6
V
Pass thru
2.0
3.6
Card reader active, fCCLK_
≤ 26MHz
2.0
3.6
VSD Supply Voltage
VSD
Card reader active, fCCLK_ > 26MHz
2.4
3.6
V
Logic Interface Supply Voltage
VIO
1.5
3.6
V
USB Supply Voltage
VTM
2.91
3.4
V
Digital Core LDO Regulator
Output Voltage
VCLDO
CCLDO = 1.0F
1.8
V
Pass thru
5
15
A
VCC Supply Current
ICC
Card reader active
35
50
mA
Pass thru
17
40
A
VSD Supply Current
ISD
Card reader active
3
mA
Pass thru
2
10
A
VIO Supply Current
IIO
Card reader active
0.2
mA
Pass thru
13
50
A
VTM Supply Current
ITM
Card reader active
25
mA
VSD Comparator Threshold
VSDCT
1.0
1.5
1.9
V
VTM Comparator Threshold
VTMCT
2.0
2.5
2.9
V
MODE, I2C_SEL, ADD, RST
Input-Voltage Low
VIL
0.4
V
ABSOLUTE MAXIMUM RATINGS
(All voltages referenced to GND.)
VCC ...........................................................................-0.3V to +4V
VSD ...........................................................................-0.3V to +4V
VIO ............................................................................-0.3V to +4V
VTM ...........................................................................-0.3V to +4V
KVBUS......................................................................-0.3V to +4V
CLDO........................................................................-0.3V to +2V
CDAT1_[3:0], HDAT1_[3:0], CCMD1, HCMD1, CCLK1, HCLK1,
CCRD_PRST, HCRD_PRST, CDAT2_[3:0], HDAT2_[3:0],
CCMD2, HCMD2, CCLK2, HCLK2 .........-0.3V to (VSD + 0.3V)
BUSY, BERR/INT, MODE, SCL, SDA, I2C_SEL,
ADD, RST.................................................-0.3V to (VIO + 0.3V)
CD+, CD-, HD+, HD-, RREF, FREF ............-0.3V to (VTM + 0.3V)
Continuous Power Dissipation (TA = +70°C)
40-Pin TQFN (derate 35.7mW/°C above +70°C) ........2857mW
Junction-to-Case Thermal Resistance (
θJC) (Note 1)
40-Pin TQFN ................................................................1.7°C/W
Junction-to-Ambient Thermal Resistance (
θJA) (Note 1)
40-Pin TQFN .................................................................28°C/W
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +160°C
Lead Temperature (soldering, 10s) .................................+300°C
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
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