參數(shù)資料
型號(hào)： MAX1191ETI-T
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類： ADC
英文描述： Ultra-Low-Power, 7.5Msps, Dual 8-Bit ADC
中文描述： 2-CH 8-BIT FLASH METHOD ADC, PARALLEL ACCESS, QCC28
封裝： 5 X 5 MM, 0.80 MM HEIGHT, MO-220, TQFN-28
文件頁(yè)數(shù)： 5/27頁(yè)
文件大小： 492K
代理商： MAX1191ETI-T
M
Ultra-Low-Power, 7.5Msps, Dual 8-Bit ADC
_______________________________________________________________________________________
5
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Normal operating mode, f
IN
= 1.875MHz
at -0.5dB FS, CLK input from GND to V
DD
4.0
5.0
Idle mode (tri-state), f
IN
= 1.875MHz at -
0.5dB FS, CLK input from GND to V
DD
4.0
Standby mode, CLK input from GND to
V
DD
2.2
mA
Analog Supply Current
I
DD
Shutdown mode, CLK = GND or V
DD
,
PD0 = PD1 = OGND
0.1
5.0
μA
Normal operating mode,
f
IN
= 1.875MHz at -0.5dB FS, C
L
≈
10pF
1.0
mA
Idle mode (tri-state), DC input, CLK =
GND or V
DD,
PD0 = OV
DD
, PD1 = OGND
0.1
5.0
Standby mode, DC input, CLK = GND or
V
DD,
PD0 = OGND, PD1 = OV
DD
0.1
Digital Output Supply Current
(Note 3)
I
ODD
Shutdown mode, CLK = GND or V
DD
,
PD0 = PD1 = OGND
0.1
5.0
μA
TIMING CHARACTERISTICS
CLK Rise to CHA Output Data
Valid
t
DOA
50% of C LK to 50% of d ata, Fi g ur e 5
( N ote 4)
1
6
8.5
ns
CLK Fall to CHB Output Data
Valid
t
DOB
50% of C LK to 50% of d ata, Fi g ur e 5
( N ote 4)
1
6
8.5
ns
CLK Rise/Fall to A/
B
Rise/Fall
Time
t
DA/
B
50% of C LK to 50% of A/
B,
Fi g ur e 5
( N ote 4)
1
6
8.5
ns
PD1 Rise to Output Enable
PD1 Fall to Output Disable
CLK Duty Cycle
CLK Duty-Cycle Variation
t
EN
t
DIS
PD0 = OV
DD
PD0 = OV
DD
5
5
50
±10
ns
ns
%
%
Wake-Up Time from Shutdown
Mode
t
WAKE, SD
(Note 5)
20
μs
Wake-Up Time from Standby
Mode
t
WAKE, ST
(Note 5)
5.5
μs
Digital Output Rise/Fall Time
INTERCHANNEL CHARACTERISTICS
20% to 80%
2
ns
Crosstalk Rejection
f
IN,X
= 1.875MHz at -0.5dB FS,
f
IN,Y
= 0.3MHz at -0.5dB FS (Note 6)
f
IN
= 1.875MHz at -0.5dB FS (Note 7)
f
IN
= 1.875MHz at -0.5dB FS (Note 7)
-75
dB
Amplitude Matching
Phase Matching
±0.03
±0.03
dB
Degrees
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 3.0V, OV
DD
= 1.8V, V
REFIN
= V
DD
(internal reference), C
L
≈
10pF at digital outputs, f
CLK
= 7.5MHz, C
REFP
= C
REFN
= C
COM
= 0.33μF, T
A
= -40
°
C to +85
°
C, unless otherwise noted. Typical values are at T
A
= +25
°
C.) (Note 1)
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