參數(shù)資料
型號: MAX1191ETI-T
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: ADC
英文描述: Ultra-Low-Power, 7.5Msps, Dual 8-Bit ADC
中文描述: 2-CH 8-BIT FLASH METHOD ADC, PARALLEL ACCESS, QCC28
封裝: 5 X 5 MM, 0.80 MM HEIGHT, MO-220, TQFN-28
文件頁數(shù): 25/27頁
文件大?。?/td> 492K
代理商: MAX1191ETI-T
M
Ultra-Low-Power, 7.5Msps, Dual 8-Bit ADC
______________________________________________________________________________________
25
Total Harmonic Distortion (THD)
THD is typically the ratio of the RMS sum of the first five
harmonics of the input signal to the fundamental itself.
This is expressed as:
where V
1
is the fundamental amplitude, and V
2
V
6
are
the amplitudes of the 2nd- through 6th-order harmonics.
Third Harmonic Distortion (HD3)
HD3 is defined as the ratio of the RMS value of the third
harmonic component to the fundamental input signal.
Spurious-Free Dynamic Range (SFDR)
SFDR is the ratio expressed in decibels of the RMS
amplitude of the fundamental (maximum signal compo-
nent) to the RMS value of the next-largest spurious
component, excluding DC offset.
Intermodulation Distortion (IMD)
IMD is the total power of the intermodulation products
relative to the total input power when two tones, f1 and
f2, are present at the inputs. The intermodulation prod-
ucts are (f1
±
f2), (2 x f1), (2 x f2), (2 x f1
±
f2), (2 x f2
±
f1). The individual input tone levels are at -7dB FS.
Third-Order Intermodulation (IM3)
IM3 is the power of the worst third-order intermodula-
tion product relative to the input power of either input
tone when two tones, f1 and f2, are present at the
inputs. The third-order intermodulation products are (2
x f1
±
f2), (2 x f2
±
f1). The individual input tone levels
are at -7dB FS.
Power-Supply Rejection
Power-supply rejection is defined as the shift in offset
and gain error when the power supplies are moved
±5%.
Small-Signal Bandwidth
A small -20dB FS analog input signal is applied to an
ADC in such a way that the signal
s slew rate does not
limit the ADC
s performance. The input frequency is
then swept up to the point where the amplitude of the
digitized conversion result has decreased by -3dB.
Note that the track/hold (T/H) performance is usually
the limiting factor for the small-signal input bandwidth.
Full-Power Bandwidth
A large -0.5dB FS analog input signal is applied to an
ADC, and the input frequency is swept up to the point
where the amplitude of the digitized conversion result
has decreased by -3dB. This point is defined as full-
power input bandwidth frequency.
THD
V
V
V
V
V
V
log
+
+
+
+
=
×
20
22
32
42
52
62
1
Chip Information
TRANSISTOR COUNT: 7925
PROCESS: CMOS
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