參數(shù)資料
型號: MAX1124EGK+D
廠商: Maxim Integrated Products
文件頁數(shù): 1/17頁
文件大?。?/td> 0K
描述: IC ADC 10BIT LVDS/PAR 68QFN-EP
標(biāo)準(zhǔn)包裝: 30
位數(shù): 10
采樣率(每秒): 250M
數(shù)據(jù)接口: LVDS,并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 657mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 68-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 68-QFN 裸露焊盤(10x10)
包裝: 管件
輸入數(shù)目和類型: 1 個單端,單極;1 個差分,單極
General Description
The MAX1124 is a monolithic 10-bit, 250Msps analog-
to-digital converter (ADC) optimized for outstanding
dynamic performance at high IF frequencies up to
500MHz. The product operates with conversion rates of
up to 250Msps while consuming only 477mW.
At 250Msps and an input frequency of 100MHz, the
MAX1124 achieves a spurious-free dynamic range
(SFDR) of 71dBc. Its excellent signal-to-noise ratio
(SNR) of 57.1dB at 10MHz remains flat (within 1dB) for
input tones up to 500MHz. This makes the MAX1124
ideal for wideband applications such as digital predis-
tortion in cellular base-station transceiver systems.
The MAX1124 requires a single 1.8V supply. The ana-
log input is designed for either differential or single-
ended operation and can be AC- or DC-coupled. The
ADC also features a selectable on-chip divide-by-2
clock circuit, which allows the user to apply clock fre-
quencies as high as 500MHz. This helps to reduce the
phase noise of the input clock source. A differential
LVDS sampling clock is recommended for best perfor-
mance. The converter’s digital outputs are LVDS com-
patible, and the data format can be selected to be
either two’s complement or offset binary.
The MAX1124 is available in a 68-pin QFN with
exposed pad (EP) and is specified over the industrial
(-40°C to +85°C) temperature range.
For pin-compatible, lower speed versions of the
MAX1124, refer to the MAX1122 (170Msps) and the
MAX1123 (210Msps) data sheets. For a pin-compatible
8-bit version of the MAX1124, refer to the MAX1121
data sheet.
Applications
Wireless and Wired Broadband Communication
Cable-Head End Systems
Digital Predistortion Receivers
Communications Test Equipment
Radar and Satellite Subsystems Antenna Array
Processing
Features
250Msps Conversion Rate
SNR = 56.8dB/55.5dB at fIN = 100MHz/500MHz
SFDR = 71dBc/63.8dBc at fIN = 100MHz/500MHz
NPR = 54.8dB at fNOTCH = 28.8MHz
Single 1.8V Supply
477mW Power Dissipation at 250Msps
On-Chip Track-and-Hold and Internal Reference
On-Chip Selectable Divide-by-2 Clock Input
LVDS Digital Outputs with Data Clock Output
Evaluation Kit Available (Order MAX1124EVKIT)
MAX1124
1.8V, 10-Bit, 250Msps Analog-to-Digital Converter
with LVDS Outputs for Wideband Applications
________________________________________________________________
Maxim Integrated Products
1
58
59
60
61
62
54
55
56
57
63
38
39
40
41
42
43
44
45
46
47
AVCC
AGND
AV
CC
TOP VIEW
AV
CC
OGND
OV
CC
ORP
ORN
D9P
D9N
D8P
D8N
52
53
D7P
D7N
AGND
AV
CC
CLKN
CLKP
AV
CC
AGND
OV
CC
OGND
N.C.
OV
CC
N.C.
D4P
D4N
OGND
OVCC
DCLKP
DCLKN
OVCC
D3P
D3N
D2P
35
36
37
D2N
D1P
D1N
AGND
INN
INP
AGND
AVCC
AGND
AVCC
AGND
REFADJ
REFIO
AGND
48
D5N
AVCC
64
AGND
65
66
67
AGND
AV
CC
68
T/B
23
22
21
20
19
27
26
25
24
18
29
28
32
31
30
D0N
D0P
34
33
49
50
D6N
D5P
51
D6P
11
10
9
8
7
6
5
4
3
2
16
15
14
13
12
1
CLKDIV 17
MAX1124
EP
Pin Configuration
Ordering Information
19-3029; Rev 2; 8/08
For pricing delivery, and ordering information please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
EVALUATION
KIT
AVAILABLE
PART
TEMP RANGE
PIN-PACKAGE
MAX1124EGK
-40
°C to +85°C
68 QFN-EP*
*
EP = Exposed pad.
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