參數(shù)資料
型號: MAX1104EUA+T
廠商: Maxim Integrated Products
文件頁數(shù): 6/17頁
文件大?。?/td> 0K
描述: IC CODEC 8BIT 8-UMAX
標(biāo)準(zhǔn)包裝: 2,500
類型: 通用
數(shù)據(jù)接口: *
分辨率(位): 8 b
ADC / DAC 數(shù)量: 1 / 1
三角積分調(diào)變:
動態(tài)范圍,標(biāo)準(zhǔn) ADC / DAC (db): 59 / 55
電壓 - 電源,模擬: 2.7 V ~ 5.5 V
電壓 - 電源,數(shù)字: 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 8-uMAX
包裝: 帶卷 (TR)
MAX1102/MAX1103/MAX1104
A minimum of 3.5s in track mode is required for com-
plete acquisition.
In continuous ADC-only conversion mode, a new con-
trol word (START = 1) reconfigures the device.
Interrupted Communication Results
If CS transitions from low to high during the reception of
a control word, the MAX1102/MAX1103/MAX1104
enters its power-on reset state (full shutdown mode). If
CS is toggled while receiving DAC data, the input is
ignored and any received bits are discarded. In both
cases, once CS returns low, the device requires a new
control word before further conversions can occur. If
CS goes high while data is read from the device, DOUT
enters a high-impedance state, and the serial clock is
ignored. When CS returns low, the remaining bits of the
conversion result can be clocked out.
Applications Information
Power-On Reset
When power is first applied, the device enters full shut-
down mode and the DAC registers are reset to 0. To
wake up the device, the proper control word must be
written and 200s allowed for the internal reference to
stablize. DAC data may be written to the device imme-
diately following the control word, but OUT will not finish
settling until the wake-up time has passed.
Power Sense
The MAX1102/MAX1103 provide a multiplexer which
sets the T/H to either AIN or one-half of VDD. With C1 =
1, the ADC converts the VDD/2 voltage, providing
power sensing capability to the system. When switch-
ing the input multiplexer, two control words must be
written before any conversion takes place. The first
control word changes the multiplexer state, and the
second starts the conversion.
Reference
The full-scale range of both the ADC and DAC is set by
the internal voltage reference. The MAX1102 provides a
+2.0V reference, the MAX1103 has a +4.0V reference,
and the MAX1104 uses VDD as the reference voltage.
ADC Transfer Function
Figure 9 depicts the ADC input/output transfer function.
Code transitions occur at the center of every LSB step.
Output coding is binary; with a 2.0V reference 1LSB =
(VREF/256) = 7.8125mV. Full scale is achieved at VAIN
= VREF - 1.5LSB. Negative input voltages are invalid
and give a zero output code. Voltages greater than full
scale give an all ones output code.
Shutdown Modes
The MAX1102/MAX1103/MAX1104 feature four soft-
ware-selectable shutdown modes, helping to conserve
power by disabling any unused portion of the device.
Bits 0 through 2 of the control word select the device
shutdown mode (Table 1). Table 2 details the four
power modes with the corresponding supply current
and operating sections.
The ADC and DAC are individually controlled and can
be shutdown independently of each other. Bit 0 (E0)
controls the DAC, a logic “1” enables the DAC, a logic
“0” disables the DAC. Bit 1 (E1) controls the ADC, a
logic “1” enables the ADC, a logic “0” disables the
ADC. Either the ADC or DAC or both can be shutdown,
conserving power when one or both converters are not
in use. A fast wake-up time (3s ADC, 10s DAC)
allows the converters to be cycled in and out of shut-
down even during short duration idle times.
Data can be written to the DAC while it is in shutdown.
A control word with A1 = 1 and E0 = 0 disables the
DAC while allowing data to be written to the DAC. The
eight bits following this control word are shifted into the
DAC register. Conversion takes place once the DAC is
enabled.
8-Bit CODECs
14
______________________________________________________________________________________
BIT
SUPPLY
CURRENT
OPERATING SECTIONS
E2
E1
E0
REF
ADC
DAC
00
0
1
A
Off
10
0
18
A
On
Off
1
0
250
A
On
Off
1
0
1
400
A
On
Off
On
1
520
AOn
On
Table 2. Operation Modes
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