參數(shù)資料
型號: MAX11043ATL+
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: ADC
英文描述: 4-Channel, 16-Bit, Simultaneous Sampling ADCs with PGA, Filter, and 8-/12-Bit Dual-Stage DAC; Package: THIN QFN, 40 pin ; Temperature Range: -40°C to +125°C
中文描述: 4-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, QCC40
封裝: 6 X 6 MM, ROHS COMPLIANT, TQFN-40
文件頁數(shù): 14/33頁
文件大?。?/td> 808K
代理商: MAX11043ATL+
MAX11043
4-Channel, 16-Bit, Simultaneous-Sampling ADCs
with PGA, Filter, and 8-/12-Bit Dual-Stage DAC
______________________________________________________________________________________
21
BIT 15
BIT 14
BIT 13
BIT 12
BIT 11
BIT 10
BIT 9
BIT 8
X
BDAC3
BDAC2
BDAC1
BDAC0
DIFF
CONFIG_ Register (0Ch–0Fh)
This register sets the input gain of each ADC channel
and selects one of the default filters or EQ function.
X<15:13>: Don’t-care bits.
BDAC3:BDAC0<12:9>: Sets the input bias voltage for
AC-coupled signals when ENBIAS_ is set to 1.
0000 = 33% of AVDD.
0001 = 35% of AVDD.
0010 = 38% of AVDD.
0011 = 40% of AVDD.
0100 = 42% of AVDD.
0101 = 44% of AVDD.
0110 = 46% of AVDD.
0111 = 48% of AVDD.
1000 = 50% of AVDD.
1001 = 52% of AVDD.
1010 = 54% of AVDD.
1011 = 56% of AVDD.
1100 = 58% of AVDD.
1101 = 60% of AVDD.
1110 = 62% of AVDD.
1111 = 65% of AVDD.
DIFF<8>: Input mode select bit.
1 = normal operation in all modes.
0 = use for a 2x input signal range in LP, gain = 1
mode. Note that THD degrades.
EQ<7>: EQ function.
1 = analog EQ enabled.
0 = analog EQ disabled (default).
MODG1:MODG0<6:5>: ADC modulator gain.
00 = 1 (default).
01 = 2.
10 = 4.
11 = 4.
PDPGA<4>: PGA power-down control.
1 = PGA powered down, gain = 1.
0 = PGA powered, PGA gain set by PGAG (default).
FILT<3>: Programmable filter select.
1 = use preprogrammed LP filter.
0 = use preprogrammed EQ filter (default).
PGAG<2>: High PGA gain setting.
1 = PGA, gain = 16.
0 = PGA, gain = 8 (default).
ENBIASP<1>: Positive input bias enable. Bias voltage
set by BDAC3:BDAC0.
1 = selfbiasing enabled.
0 = selfbiasing disabled (default).
ENBIASN<0>: Negative input bias enable. Bias volt-
age set by BDAC3:BDAC0.
1 = selfbiasing enabled.
0 = selfbiasing disabled (default).
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
EQ
MODG1
MODG0
PDPGA
FILT
PGAG
ENBIASP
ENBIASN
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MAX11043ATL+ 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 16Bit 4Ch Simul-Samp w/PGA & 8/12Bit D-S RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
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