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參數(shù)資料
| 型號： | MAX11043ATL+ |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | ADC |
| 英文描述： | 4-Channel, 16-Bit, Simultaneous Sampling ADCs with PGA, Filter, and 8-/12-Bit Dual-Stage DAC; Package: THIN QFN, 40 pin ; Temperature Range: -40°C to +125°C |
| 中文描述： | 4-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, QCC40 |
| 封裝： | 6 X 6 MM, ROHS COMPLIANT, TQFN-40 |
| 文件頁數(shù)： | 11/33頁 |
| 文件大?。?/td> | 808K |
| 代理商： | MAX11043ATL+ |
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MAX11043
4-Channel, 16-Bit, Simultaneous-Sampling ADCs
with PGA, Filter, and 8-/12-Bit Dual-Stage DAC
______________________________________________________________________________________
19
Register Functions
ADCA, ADCB, ADCC, and ADCD
Result Registers (00h–03h)
The ADC channel A, B, C, and D result registers pro-
vide the result data from the 4 ADC channels.
EOC
asserts low when new data is available. Initiate a data
read prior to the next rising edge of
EOC or the result is
overwritten. Set bit 5 of the configuration register 08h
high to read the data out in 24-bit resolution or set bit 5
low to read the data out in 16-bit resolution.
ADCAB, ADCCD, and ADCABCD
Result Registers (04h–06h)
Registers ADCAB, ADCCD, and ADCABCD contain
concatenated ADC results ensuring simultaneous
results are read. This reduces the risk of reading sam-
ples delayed by one cycle from channel to channel.
Set bit 5 of the configuration register 08h high to read
the data out in 24-bit resolution or set bit 5 low to read
the data out in 16-bit resolution.
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
X
Flash Busy
BOOT
OFLGA
OFLGB
OFLGC
OFLGD
Status Register (07h)
The status register contains the channel overflow flags
and POR bits.
X<7:6>: Don’t-care bits.
Flash Busy<5>: Do not start a new flash operation until
this is 0.
BOOT<4>: Power-on reset flag.
OFLG_<3:0>: Channel overflow flag, one per channel.
BIT 15
BIT 14
BIT 13
BIT 12
BIT 11
BIT 10
BIT 9
BIT 8
EXTCLK
CLKDIV1
CLKDIV0
PD
PDA
PDB
PDC
PDD
Configuration Register (08h)
EXTCLK<15>: External clock select.
1 = logic-level clock supplied on OSCIN.
0 = crystal or resonator connected between OSCIN
and OSCOUT (default).
CLKDIV1:CLKDIV0<14:13>: Clock divider ratio (EX
clock : ADC sample clock).
00 = 1:2 clock divider.
01 = 1:3 clock divider.
10 = 1:4 clock divider.
11 = 1:6 clock divider (default).
PD<12>: Power-down analog circuitry (reference and
SPI interface remains active).
1 = low-power mode.
0 = normal operation (default).
PD_<11:8>: ADC power-down for each channel (A, B,
C, and D).
1 = powers down analog signal path.
0 = normal operation (default).
PDDAC< 7>: DAC power-down.
1 = fine DAC buffer powered down.
0 = normal operation (default).
PDOSC<6>: Oscillator power-down.
1 = oscillator powered down (disconnects EX clock in
EX clock mode).
0 = normal operation (default).
24BIT<5>: ADC output data format.
1 = ADC data output as 24 bits.
0 = ADC data output as 16 bits (default).
Use the 24-bit ADC output in conjunction with external
digital filtering to improve signal-to-noise ratio.
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
PDDAC
PDOSC
24BIT
SCHANA
SCHANB
SCHANC
SCHAND
DECSEL
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX11043ATL+ | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 16Bit 4Ch Simul-Samp w/PGA & 8/12Bit D-S RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX11043ATL+T | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 16Bit 4Ch Simul-Samp w/PGA & 8/12Bit D-S RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX11044 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:4-/6-/8-Channel, 16-Bit, Simultaneous-Sampling ADCs |
| MAX11044_10 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:4-/6-/8-Channel, 16-Bit, Simultaneous-Sampling ADCs |
| MAX11044_11 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:4-/6-/8-Channel, 16-/14-Bit, Simultaneous-Sampling ADCs |
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