參數(shù)資料
型號: MAC7121VVF
廠商: Motorola, Inc.
英文描述: MAC7100 Microcontroller Family Hardware Specifications
中文描述: MAC7100微控制器系列硬件規(guī)格
文件頁數(shù): 15/48頁
文件大?。?/td> 1514K
代理商: MAC7121VVF
15
MAC7100 Microcontroller Family Hardware Specifications
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
For More Information On This Product,
Go to: www.freescale.com
MOTOROLA
Electrical Characteristics
3.8.2
PLL Filter Characteristics
The oscillator provides the reference clock for the PLL. The voltage controlled oscillator (VCO) of the PLL
is also the system clock source in self clock mode. In order to operate reliably, care must be taken to select
proper values for external loop filter components.
Figure 3. Basic PLL Functional Diagram
The procedure described below can be used to calculate the resistance and capacitance values using typical
values for K
1
, f
1
and i
ch
from Table 18. First, the VCO Gain at the desired VCO output frequency is
approximated by:
The phase detector relationship is given by:
i
ch
is the current in tracking mode. The loop bandwidth f
C
should be chosen to fulfill the Gardner’s stability
criteria by at least a factor of 10, typical values are 50.
ζ
= 0.9 ensures a good transient response.
And finally the frequency relationship is defined as
With the above inputs the resistance can be calculated as:
The capacitance C
S
can now be calculated as:
The capacitance C
P
should be chosen in the range of:
The stabilization delays shown in Table 18 are dependant on PLL operational settings and external
component selection (for example, crystal, XFC filter).
Phase
Detector
1
REFDV+1
K
φ
f
REF
V
DD
PLL
R
C
P
C
S
K
V
Loop Divider
1
SYNR+1
f
VCO
f
OSC
1
2
f
CMP
VCO
K
V
K
1
e
1
--------–
)
=
K
Φ
i
ch
K
V
=
f
C
2
ζ
f
----------------------------------------
π
ζ
1
ζ
2
+
+
(
)
50
------
f
C
f
4 50
-------------
ζ
0.9
=
(
)
;
<
<
n
f
f
ref
-----------
2
synr
1
+
(
)
=
=
R
2
π
n f
C
K
Φ
---------------------------
=
C
S
ζ
2
f
C
R
---2
f
C
R
0.516
ζ
0.9
=
(
)
;
=
C
S
20
÷
C
P
C
S
10
÷
F
Freescale Semiconductor, Inc.
n
.
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