參數(shù)資料
型號(hào)： MAC7121MAG50
廠商： 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述： Microcontroller Family Hardware Specifications
中文描述： 微控制器系列硬件規(guī)格
文件頁數(shù)： 9/56頁
文件大?。?/td> 471K
代理商： MAC7121MAG50
Electrical Characteristics
MAC7100 Microcontroller Family Hardware Specifications, Rev. 1.2
Preliminary
Freescale Semiconductor
9
Note that the JEDEC specification reserves the symbol R
θ
JA
or
θ
JA
(Theta-JA) strictly for junction-to-
ambient thermal resistance on a 1s test board in natural convection environment. R
θ
JMA
or
θ
JMA
(Theta-JMA) will be used for both junction-to-ambient on a 2s2p test board in natural convection and for
junction-to-ambient with forced convection on both 1s and 2s2p test boards. It is anticipated that the
generic name,
θ
JA
, will continue to be commonly used.
The average chip-junction temperature (T
J
) in
°
C is obtained from the formula:
Eqn. 1
where
The total power dissipation is calculated as:
Eqn. 2
where
Two cases must be considered for P
INT
:
1. Internal voltage regulator enabled:
Eqn. 3
2. Internal voltage regulator disabled (V
DD
R = V
SS
R = system ground):
Eqn. 4
P
IO
is the sum of all output currents on input/output pins associated with V
DD
X:
Eqn. 5
where
Eqn. 6
or
Eqn. 7
Table 10. Thermal Resistance 1/8 Simulation Model Packaging Parameters
Component
Mold Compound
Leadframe (Copper)
Die Attach
Conductivity
0.9 W/m K
263 W/m K
1.7 W/m K
T
J
T
A
P
D
Θ
JA
+
=
T
J
T
A
P
D
Θ
JA
Junction Temperature (
°
C)
Ambient Temperature (
°
C)
Total Chip Power Dissipation (W)
Package Thermal Resistance (
°
C/W)
=
=
=
=
P
D
P
INT
P
IO
+
=
P
INT
P
IO
Chip Internal Power Dissipation (W)
Input / Output Power Dissipation (W)
=
=
P
INT
I
DD
R
V
DD
R
×
(
)
I
DD
A
V
DD
A
×
(
)
+
=
P
INT
I
DD
2.5
V
DD
2.5
×
(
)
I
DD
PLL
V
DD
PLL
×
(
)
I
DD
A
V
DD
A
×
(
)
+
+
=
P
IO
R
DSON
i
∑
I
IO
i
(
)
2
=
R
DSON
V
I
OL
---------
(for outputs driven low)
=
R
DSON
V
X
------------------------------
(for outputs driven high)
V
–
I
OL
=
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