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  • 參數(shù)資料
    型號(hào): M8813F3Y-90K1T
    廠商: STMICROELECTRONICS
    元件分類: 微控制器/微處理器
    英文描述: 1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQCC52
    封裝: PLASTIC, LCC-52
    文件頁數(shù): 64/85頁
    文件大小: 601K
    代理商: M8813F3Y-90K1T
    67/85
    M88 FAMILY
    Table 50B. Read Timing (3 V Range)
    Note: 1. RD timing has the same timing as DS, LDS, UDS, and PSEN signals.
    2. RD and PSEN have the same timing for 8031.
    3. Any input used to select an internal M88x3Fxx FLASH+P SD function.
    4. In multiplexed mode latched address generated from ADIO delay to address output on any Port.
    5. RD timing has the same timing as DS, LDS, and UDS signals.
    Symbol
    Parameter
    Condi tions
    -15
    Turbo
    Off
    Unit
    Min
    Max
    tLVLX
    ALE or AS Pulse Width
    28
    ns
    tAVLX
    Address Setup Time
    (Note 3)
    10
    ns
    tLXAX
    Address Hold Time
    (Note 3)
    12
    ns
    tAVQV
    Address Valid to Data Valid
    (Note 3)
    150
    Add 20
    ns
    tSLQV
    CS Valid to Data Valid
    150
    ns
    tRLQV
    RD to Data Valid 8-Bit Bus
    (Note 5)
    35
    ns
    RD or PSEN to Data Valid 8-Bit Bus,
    8031, 80251
    (Note 2)
    50
    ns
    tRHQX
    RD Data Hold Time
    (Note 1)
    0ns
    tRLRH
    RD Pulse Width (also DS, LDS, UDS)
    40
    ns
    RD or PSEN Pulse Width (8031, 80251)
    55
    ns
    tRHQZ
    RD to Data High-Z
    (Note 1)
    45
    ns
    tEHEL
    E Pulse Width
    52
    ns
    tTHEH
    R/W Setup Time to Enable
    18
    ns
    tELTL
    R/W Hold Time After Enable
    0
    ns
    tAVPV
    Address Input Valid to
    Address Output Delay
    (Note 4)
    48
    ns
    相關(guān)PDF資料
    PDF描述
    M906-01-125.0000LF 125 MHz, OTHER CLOCK GENERATOR, CQCC36
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