deveopmen
Rev.B2 for proof reading
Reset
Mitsubishi Microcomputers
M32C/83 group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
30
(0148
16
)
(0149
16
)
(014A
16
)
(014B
16
)
(014C
16
)
(014D
16
)
(014E
16
)
(014F
16
)
(0150
16
)
(0151
16
)
(0152
16
)
(0153
16
)
(0154
16
)
(0155
16
)
(0156
16
)
(0157
16
)
(0160
16
)
(0161
16
)
(0162
16
)
(0163
16
)
(0164
16
)
(0166
16
)
(0167
16
)
(016A
16
)
(016B
16
)
(016C
16
)
(016D
16
)
(016E
16
)
(016F
16
)
(0170
16
)
(0171
16
)
(0172
16
)
(0124
16
)
(0125
16
)
(0126
16
)
(0127
16
)
(0128
16
)
(0129
16
)
(012A
16
)
(012C
16
)
(012D
16
)
(012E
16
)
(012F
16
)
(0130
16
)
(0131
16
)
(0132
16
)
(0133
16
)
(0134
16
)
(0135
16
)
(0138
16
)
(0139
16
)
(013A
16
)
(013B
16
)
(013C
16
)
(013D
16
)
(013E
16
)
(013F
16
)
(0140
16
)
(0141
16
)
(0142
16
)
(0143
16
)
(0144
16
)
(0145
16
)
(0146
16
)
(0147
16
)
Group 1 time measurement prescaler register 6
Group 1 time measurement prescaler register 7
Group 1 function enable register
Group 1 function select register
Group 1 SI/O receive buffer register
Group 1 transmit buffer/receive data register
Group 1 receive input register
Group 1 SI/O communication mode register
Group 1 transmit output register
Group 1 SI/O communication control register
Group 1 data compare register 0
Group 1 data compare register 1
Group 1 data compare register 2
Group 1 data compare register 3
Group 1 data mask register 0
Group 1 data mask register 1
Group 1 receive CRC code register
Group 1 transmit CRC code register
Group 1 SI/O expansion mode register
Group 1 SI/O expansion receive control register
Group 1 SI/O special communication
interrupt detect register
Group 1 SI/O expansion transmit control register
Group 2 waveform generate register 0
Group 2 waveform generate register 1
Group 2 waveform generate register 2
Group 2 waveform generate register 3
(165)
(166)
(167)
(168)
(169)
(170)
(171)
(172)
(173)
(174)
(175)
(176)
(177)
(178)
(179)
(180)
(181)
(182)
(183)
(184)
(185)
(186)
(187)
(188)
(189)
(190)
(191)
(192)
(193)
(194)
(195)
(196)
(197)
(198)
(199)
(200)
(201)
(202)
(203)
(204)
(205)
(206)
(207)
(208)
(209)
(210)
(211)
(212)
(213)
(214)
Group 2 waveform generate register 4
Group 2 waveform generate register 5
Group 2 waveform generate register 6
Group 2 waveform generate register 7
Group 2 waveform generate control register 0
Group 2 waveform generate control register 1
Group 2 waveform generate control register 2
Group 2 waveform generate control register 3
Group 2 waveform generate control register 4
Group 2 waveform generate control register 5
Group 2 waveform generate control register 6
Group 2 waveform generate control register 7
Group 2 base timer register
Group 2 base timer control register 0
Group 2 base timer control register 1
Base timer start register
Group 2 function enable register
Group 2 RTP output buffer register
Group 2 SI/O communication mode register
Group 2 SI/O communication control register
Group 2 SI/O transmit buffer register
Group 2 SI/O receive buffer register
Group 2 IEBus address register
Group 2 IEBus control register
X000XXXX
0000X 0 1 1
00XXX0 0 0
0 0 0 0X110
XX
XXXXXXX
XXXX
XXXX000 0
00
16
00
16
00
16
00
16
00
16
00
16
00
16
00
16
16
16
00
16
00
16
00
16
00
16
16
16
16
00
16
00
16
16
16
16
00
16
16
16
16
16
16
16
16
00
16
00
16
00
16
00
16
16
16
00
16
00
16
00XXX00 0
x : Nothing is mapped to this bit
: Undefined
The content of other registers and RAM is undefined when the microcomputer is reset. The initial values must therefore be set.
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
000000XX
00000XXX
Figure 1.4.3. Device's internal status after a reset is cleared (4/10)