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參數(shù)資料
| 型號： | M65817AFP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | Digital Amplifier Processor of S-Master Technology |
| 中文描述： | 數(shù)字放大器處理器的S - Master技術(shù) |
| 文件頁數(shù)： | 23/28頁 |
| 文件大?。?/td> | 246K |
| 代理商： | M65817AFP |
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Digital Amplifier Processor of S-Master* Technology
M65817AFP
MITSUBISHI SOUND PROCESSOR ICs
MITSUBISHI
ELECTRIC
Flag to "Enable" Asynchronous Detection for Secondary Block (bit8:
ASYNCEN2
).
ASYNCEN2 : "L"…disable.
"H"…enable.
Under condition of ASYNCEN2="L", secondary side asynchronous detection is ineffective whether FsiI Clock is not
inputted, there by M65817AFP does not operate function under asynchronous position, for instance mute operation.
PWM Output Pins L/R Reverse.(bit9:
CHSEL
).
"L": L/R no reverse, "H": L/R reverse.
Σ
: Rch Input Phase (bit10:
DRPOL
).
"L": Positive Phase(Through).
"H": This setting makes
Σ
Rch input in reverse, further makes PWM block input phase reverse,
ultimately phase becomes Positive Phase(Input pin and output pin's phase is same).
Rate Converter Block Reset (Initialize function) (bit11:
SRCRST
).
SRCRST: "L"…normal operation .
"H”>>"L" edge…Reset(initialize function).
Zero Mute of Gain Control Input (bit13:
GIMUTE
).
GIMUTE: "L"…Mute release, "H"…Mute.
Duty 50% Mute of PWM Output (bit14:
NSPMUTE
).
NSPMUTE: "L"…Mute release.
"H"…PWM output duty 50 % mute.
This function is able to do NSPMUTE pin (39 pin), too. (This Mute function can be set either NSPMUTE register
or NSPMUTE pin.)
PWM Output Data G_MUTE. (bit15:
PGMUTE
).
Under condition of G_MUTE flag ="H", each PWM outputs are fixed below.
OUTL1+
and
OUTR1+
= "L",
OUTL2+
and
OUTR2+
= "L”
OUTL1-
and
OUTR1-
= "H",
OUTL2-
and
OUTR2-
= "H"
"L"…Mute release, "H"…Mute.
PGMUTE function exists at
PGMUTE
pin (39 pin), too(PGMUTE function and
PGMUTE
pin are same function.
This Mute function can be set either NSPMUTE function or
NSPMUTE
pin.)
Σ
Block : Operation RATE (bit16:
NSSPEED
).
NSSPEED: "L” fixed
NSSPEED function becomes 16Fs fixed.
Σ
Block : Output Bit Number Setting (bit17:
NSOBIT
).
Bit17 selects bit numbers of
Σ
Block .
NSOBIT: "L"…6bits(63 values).
"H"…5bits(31values).
(At MCKSEL="H", bit numbers of
Σ
Block become 5bits(31values) fixed.
Σ
Block: DC dithering Rch Phase (bit18:
DCDRPOL
).
DCDRPOL: "L"…In phase (toward the left channel).
"H"…Out of phase.
Σ
Block: DC dithering Selection (bit19,bit20:
DCDSEL0,DCDSEL1
).
Refer to Table 3-2.
Σ
Block: AC dithering Rch Phase (bit21:
ACDRPOL
).
ACDRPOL: "L"…In phase (toward the left channel).
"H"…Out of phase.
Σ
Block: AC dithering Selection (bit22,bit23,bit24:
ACDSEL0,ACDSEL1,ACDSEL2
).
Refer to Table 3-3.
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| M65818AFP | 制造商:Renesas Electronics Corporation 功能描述:M65818AFP |
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| M65824FP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SIGNAL PROCESSOR FOR CD PLAYER WITH BUILT-IN D/A |
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