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參數(shù)資料
| 型號(hào)： | M5M4V64S30ATP-12 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM |
| 中文描述： | 64M號(hào)（4銀行甲2097152字× 8位）同步DRAM |
| 文件頁(yè)數(shù)： | 19/51頁(yè) |
| 文件大小： | 1161K |
| 代理商： | M5M4V64S30ATP-12 |
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MITSUBISHI LSIs
MITSUBISHI ELECTRIC
M5M4V64S20ATP-8A,-8L,-8, -10L, -10
64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM
SDRAM (Rev.1.3)
Mar98
BURST INTERRUPTION
[ Read Interrupted by Read ]
Burst read operation can be interrupted by new read of any bank. Random column access is allowed.
READ to READ interval is minimum 1 CLK.
[ Read Interrupted by Write ]
Burst read operation can be interrupted by write of any bank. Random column access is allowed. In this
case, the DQ should be controlled adequately by using the DQM to prevent the bus contention. The output
is disabled automatically 1 cycle after WRITE assertion.
Read Interrupted by Read (BL=4, CL=3)
CLK
Command
A0-9
A10
BA0,1
DQ
Yi
Qai0
Qaj1 Qbk0 Qbk1
Qaj0
Qbk2
Qal0
Qal1
Qal2
Qal3
READ READ
READ
READ
Yj
Yk
Yl
0
0
0
0
00
10
00
01
A11
DQM control
Write control
Read Interrupted by Write (BL=4, CL=3)
CLK
Command
A0-9
A10
BA0,1
Q
READ
Yi
0
00
Qai0
Write
Yj
0
00
D
Daj0
Daj1
Daj2
Daj3
DQM
A11
19
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| M5M4V64S30ATP-8 | 30V N-Channel PowerTrench MOSFET |
| M5M4V64S30ATP-8A | Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs 20-SOIC -40 to 85 |
| M5M4V64S30ATP-8L | Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs 20-SOIC -40 to 85 |
| M5M4V64S40ATP-10 | 64M (4-BANK x 1048576-WORD x 16-BIT) Synchronous DRAM |
| M5M4V64S40ATP-10L | 64M (4-BANK x 1048576-WORD x 16-BIT) Synchronous DRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M5M4V64S30ATP-8 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM |
| M5M4V64S30ATP-8A | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM |
| M5M4V64S30ATP-8L | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM |
| M5M4V64S40ATP-10 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 1048576-WORD x 16-BIT) Synchronous DRAM |
| M5M4V64S40ATP-10L | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 1048576-WORD x 16-BIT) Synchronous DRAM |
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