參數(shù)資料
型號: M5M4V64S30ATP-10
廠商: Mitsubishi Electric Corporation
英文描述: Octal D-Type Transparent Latches With 3-State Outputs 20-TSSOP -40 to 85
中文描述: 64M號(4銀行甲4194304字× 4位)同步DRAM
文件頁數(shù): 8/51頁
文件大小: 1161K
代理商: M5M4V64S30ATP-10
MITSUBISHI LSIs
MITSUBISHI ELECTRIC
M5M4V64S20ATP-8A,-8L,-8, -10L, -10
64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM
SDRAM (Rev.1.3)
Mar98
FUNCTION TRUTH TABLE(continued)
Current State
/CS
/RAS
/CAS
/WE
Address
Command
Action
PRE -
CHARGING
H
X
X
X
X
DESEL
NOP (Idle after tRP)
L
H
H
H
X
NOP
NOP (Idle after tRP)
L
H
H
L
BA
TBST
ILLEGAL*2
L
H
L
X
BA, CA, A10
READ / WRITE ILLEGAL*2
L
L
H
H
BA, RA
ACT
ILLEGAL*2
L
L
H
L
BA, A10
PRE / PREA
NOP*4 (Idle after tRP)
L
L
L
H
X
REFA
ILLEGAL
L
L
L
L
Op-Code,
Mode-Add
MRS
ILLEGAL
ROW
ACTIVATING
H
X
X
X
X
DESEL
NOP (Row Active after tRCD)
L
H
H
H
X
NOP
NOP (Row Active after tRCD)
L
H
H
L
BA
TBST
ILLEGAL*2
L
H
L
X
BA, CA, A10
READ / WRITE ILLEGAL*2
L
L
H
H
BA, RA
ACT
ILLEGAL*2
L
L
H
L
BA, A10
PRE / PREA
ILLEGAL*2
L
L
L
H
X
REFA
ILLEGAL
L
L
L
L
Op-Code,
Mode-Add
MRS
ILLEGAL
WRITE RE-
COVERING
H
X
X
X
X
DESEL
NOP
L
H
H
H
X
NOP
NOP
L
H
H
L
BA
TBST
ILLEGAL*2
L
H
L
X
BA, CA, A10
READ / WRITE ILLEGAL*2
L
L
H
H
BA, RA
ACT
ILLEGAL*2
L
L
H
L
BA, A10
PRE / PREA
ILLEGAL*2
L
L
L
H
X
REFA
ILLEGAL
L
L
L
L
Op-Code,
Mode-Add
MRS
ILLEGAL
8
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參數(shù)描述
M5M4V64S30ATP-10L 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
M5M4V64S30ATP-12 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
M5M4V64S30ATP-8 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM
M5M4V64S30ATP-8A 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM
M5M4V64S30ATP-8L 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM