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參數(shù)資料
| 型號(hào)： | M5M4V64S30ATP-10 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | Octal D-Type Transparent Latches With 3-State Outputs 20-TSSOP -40 to 85 |
| 中文描述： | 64M號(hào)（4銀行甲4194304字× 4位）同步DRAM |
| 文件頁(yè)數(shù)： | 24/51頁(yè) |
| 文件大?。?/td> | 1161K |
| 代理商： | M5M4V64S30ATP-10 |
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MITSUBISHI LSIs
MITSUBISHI ELECTRIC
M5M4V64S20ATP-8A,-8L,-8, -10L, -10
64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM
SDRAM (Rev.1.3)
Mar98
AUTO REFRESH
Single cycle of auto-refresh is initiated with a REFA (/CS= /RAS= /CAS= L, /WE= /CKE= H) command.
The refresh address is generated internally. 4096 REFA cycles within 64ms refresh 64Mbit memory cells.
The auto-refresh is performed on 4 banks concurrently. Before performing an auto-refresh, all banks must
be in the idle state. Auto-refresh to auto-refresh interval is minimum tRC. Any command must not be
supplied to the device before tRC from the REFA command.
Auto-Refresh
CLK
/CS
/RAS
/CAS
/WE
CKE
A0-11
BA0,1
Auto Refresh on All Banks
minimum tRC
NOP or DESELECT
Auto Refresh on All Banks
24
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| M5M4V64S30ATP-12 | 64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM |
| M5M4V64S30ATP-8 | 30V N-Channel PowerTrench MOSFET |
| M5M4V64S30ATP-8A | Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs 20-SOIC -40 to 85 |
| M5M4V64S30ATP-8L | Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs 20-SOIC -40 to 85 |
| M5M4V64S40ATP-10 | 64M (4-BANK x 1048576-WORD x 16-BIT) Synchronous DRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M5M4V64S30ATP-10L | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM |
| M5M4V64S30ATP-12 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM |
| M5M4V64S30ATP-8 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM |
| M5M4V64S30ATP-8A | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM |
| M5M4V64S30ATP-8L | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:64M (4-BANK x 2097152-WORD x 8-BIT) Synchronous DRAM |
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