參數(shù)資料
型號(hào)： M59DR032A100N6T
廠商： 意法半導(dǎo)體
英文描述： 32 Mbit 2Mb x16, Dual Bank, Page Low Voltage Flash Memory
中文描述： 32兆位的2Mb x16插槽，雙行，第低壓閃存
文件頁(yè)數(shù)： 3/38頁(yè)
文件大小： 270K
代理商： M59DR032A100N6T
11/38
M59DR032A, M59DR032B
Bank Erase (BKE) Instruction. This instruction
uses six write cycles and is used to erase all the
blocks belonging to the selected bank. The Erase
Set-up command 80h is written to address 555h
on the third cycle after the two Coded cycles. The
Bank Erase Confirm command 10h is similarly
written on the sixth cycle after another two Coded
cycles at an address within the selected bank. If
the second command given is not an erase con-
firm or if the Coded cycles are wrong, the instruc-
tion aborts and the device is reset to Read Array.
It is not necessary to program the array with 00h
first as the P/E.C. will automatically do this before
erasing it to FFh. Read operations within the same
bank after the sixth rising edge of W or E output
the Status Register bits. During the execution of
the erase by the P/E.C., Data Polling bit DQ7 re-
turns ’0’, then ’1’ on completion. The Toggle bit
DQ6 toggles during erase operation and stops
when erase is completed. After completion the
Status Register bit DQ5 returns ’1’ if there has
been an Erase Failure.
Erase Suspend (ES) Instruction. In a dual bank
memory the Erase Suspend instruction is used to
read data within the bank where erase is in
progress. It is also possible to program data in
blocks not being erased.
The Erase Suspend instruction consists of writing
the command B0h without any specific address.
No Coded Cycles are required. Erase suspend is
accepted only during the Block Erase instruction
execution. The Toggle bit DQ6 stops toggling
when the P/E.C. is suspended within 15s after
the Erase Suspend (ES) command has been writ-
ten. The device will then automatically be set to
Read Memory Array mode. When erase is sus-
pended, a Read from blocks being erased will out-
put DQ2 toggling and DQ6 at '1'. A Read from a
block not being erased returns valid data. During
suspension the memory will respond only to the
Erase Resume ER and the Program PG instruc-
tions. A Program operation can be initiated during
erase suspend in one of the blocks not being
erased. It will result in DQ6 toggling when the data
is being programmed.
Erase Resume (ER) Instruction. If
an
Erase
Suspend instruction was previously executed, the
erase operation may be resumed by giving the
command 30h, at an address within the bank be-
ing erased and without any Coded Cycle.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M59DR032A100ZB1T 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:32 Mbit 2Mb x16, Dual Bank, Page Low Voltage Flash Memory
M59DR032A100ZB6T 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:32 Mbit 2Mb x16, Dual Bank, Page Low Voltage Flash Memory
M59DR032A120N1T 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:32 Mbit 2Mb x16, Dual Bank, Page Low Voltage Flash Memory
M59DR032A120N6T 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:32 Mbit 2Mb x16, Dual Bank, Page Low Voltage Flash Memory
M59DR032A120ZB1T 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:32 Mbit 2Mb x16, Dual Bank, Page Low Voltage Flash Memory
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