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參數(shù)資料
| 型號： | M54HCT139 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Dual 2 to 4 Decoder/Demultiplexer(雙2-4線譯碼器/多路分解器) |
| 中文描述： | 雙2至4解碼器/多路解復(fù)用器（雙2-4線譯碼器/多路分解器） |
| 文件頁數(shù)： | 1/9頁 |
| 文件大?。?/td> | 238K |
| 代理商： | M54HCT139 |
M54HCT139
M74HCT139
February 1993
DUAL 2 TO 4 DECODER/DEMULTIPLEXER
B1R
(Plastic Package)
ORDER CODES :
M54HCT139F1R
M74HCT139B1R
M74HCT139M1R
M74HCT139C1R
F1R
(CeramicPackage)
M1R
C1R
(Chip Carrier)
PIN CONNECTIONS
(top view)
NC =
No Internal
Connection
INPUT AND OUTPUT EQUIVALENT CIRCUIT
DESCRIPTION
The M54/74HCT139 is a high speed CMOS DUAL
TWO LINE TO FOUR LINE DECODER/DEMULTI-
PLEXER fabricated in silicon gate C2MOS technol-
ogy. It has the same high speed performance of
LSTTL combined with true CMOS low power con-
sumption.Theactivelowenable inputcan beusedfor
gating or as a data input for demultiplexing applica-
tions. While theenable input is held high, all four out-
puts are high independently of the other inputs. All
inputs are equipped with protection circuits against
staticdischarge andtransient excessvolt-age.This in-
tegrated circuit has input and output characteristics
that are fully compatible with 54/74 LSTTL logic
families.M54/74HCT devicesare designed todirectly
interface HSC
2
MOS systems with TTL and NMOS
components. They are also plug in replacements for
.
HIGH SPEED
t
PD
= 17 ns(TYP.) AT V
CC
= 5 V
.
LOWPOWER DISSIPATION
I
CC
= 4
μ
A(MAX.) AT T
A
= 25
°
C
.
COMPATIBLE WITHTTL OUTPUTS
V
IH
= 2V (MIN.) V
IL
= 0.8V (MAX)
.
OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
.
SYMMETRICAL OUTPUT IMPEDANCE
|I
OH
| = I
OL
= 4 mA (MIN.)
.
BALANCEDPROPAGATION DELAYS
t
PLH
= t
PHL
.
PIN ANDFUNCTION COMPATIBLE
WITH 54/74LS139
1/9
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